uboot/arch/powerpc/cpu/mpc85xx
York Sun 57125f222e powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional
This erratum applies to the following SoCs:
P4080 rev 1.0, 2.0, fixed in rev 3.0
P2041 rev 1.0, 1.1, fixed in rev 2.0
P3041 rev 1.0, 1.1, fixed in rev 2.0.

Workaround for erratum NMG_CPU_A011 is enabled by default. This workaround
may degrade performance. P4080 erratum CPU22 shares the same workaround.
So it is always enabled for P4080. For other SoCs, it can be disabled by
hwconfig with syntax:

fsl_cpu_a011:disable

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:13 -05:00
..
Makefile MPC83xx, MPC85xx: compile stub cache function 2012-07-21 23:37:48 +02:00
cache.c MPC8xxx: Define cache ops for USB 2012-06-07 23:29:19 +02:00
cmd_errata.c powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional 2012-08-23 10:24:13 -05:00
commproc.c
config.mk
cpu.c
cpu_init.c powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional 2012-08-23 10:24:13 -05:00
cpu_init_early.c powerpc/85xx:Make debug exception vector accessible 2012-07-06 17:30:30 -05:00
cpu_init_nand.c powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting 2012-07-06 17:30:31 -05:00
ddr-gen1.c
ddr-gen2.c
ddr-gen3.c powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB 2012-08-08 17:13:38 -05:00
ether_fcc.c arch/powerpc/cpu/mpc85xx/ether_fcc.c: Fix compile warning 2012-05-22 13:41:46 -05:00
fdt.c powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER() 2012-07-06 17:30:33 -05:00
fixed_ivor.S
fsl_corenet_serdes.c
fsl_corenet_serdes.h
interrupts.c
liodn.c
mp.c
mp.h
mpc8536_serdes.c
mpc8544_serdes.c
mpc8548_serdes.c
mpc8568_serdes.c
mpc8569_serdes.c
mpc8572_serdes.c
p1010_serdes.c
p1021_serdes.c
p1022_serdes.c
p1023_serdes.c
p2020_serdes.c
p2041_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p2041_serdes.c powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER() 2012-07-06 17:30:33 -05:00
p3041_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p3041_serdes.c
p3060_ids.c
p3060_serdes.c
p4080_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p4080_serdes.c
p5020_ids.c powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs 2012-08-08 18:32:16 -05:00
p5020_serdes.c
pci.c
portals.c
qe_io.c
release.S powerpc/mpc85xx: Make NMG_CPU_A011 workaround conditional 2012-08-23 10:24:13 -05:00
resetvec.S
serial_scc.c
speed.c
start.S mpc85xx: Initial SP alignment is wrong. 2012-08-22 16:07:42 -05:00
tlb.c
traps.c
u-boot-nand.lds powerpc/85xx: fix NAND boot linker scripts for -fpic 2012-05-18 17:34:39 -05:00
u-boot-nand_spl.lds powerpc/85xx: fix NAND boot linker scripts for -fpic 2012-05-18 17:34:39 -05:00
u-boot.lds