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Shaohui Xie 44d50f0b54 powerpc/p2041rdb: set sysclk according to status of physical switch SW1 
P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8],
software need to read the SW1 status to decide what the sysclk needs.

SW1[8~6] : frequency
0 0 1 : 83.3MHz
0 1 0 : 100MHz
others: 66.667MHz

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 		2011-10-03 08:30:02 -05:00
..
Makefile powerpc/85xx: Refactor P2041RDB to use common p_corenet files 2011-09-29 19:01:06 -05:00
cpld.c powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 2011-10-03 08:29:54 -05:00
cpld.h powerpc/p2041rdb: set sysclk according to status of physical switch SW1 2011-10-03 08:30:02 -05:00
ddr.c MPC8xxx: drop redundant boot messages 2011-07-29 08:53:39 -05:00
eth.c powerpc/p2041rdb: Add ethernet support on P2041RDB board 2011-09-29 19:01:05 -05:00
p2041rdb.c powerpc/p2041rdb: set sysclk according to status of physical switch SW1 2011-10-03 08:30:02 -05:00