uboot/cpu/mpc85xx
Peter Tyser 3beb40c247 85xx: Ensure BSS segment isn't linked at address 0
When U-Boot is relocated from flash to RAM pointers are modified
accordingly.  However, pointers initialzed with NULL values should not
be modified so that they maintain their intended NULL value.  If the
BSS segment is linked at address 0 its address will not be
updated as necessary during relocation.

This is a temporary workaround.  The end goal is to add support to
U-Boot to dynamically locate the BSS at an arbitrary address at
runtime.  When the ability to fixup the BSS inteligently is
added, this workaround can be removed and the 85xx link script
can put the BSS at a fixed address at link time.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-08 00:33:47 +02:00
..
Makefile ppc/p4080: Add various p4080 related defines (and p4040) 2009-09-24 12:05:28 -05:00
commproc.c ppc/85xx: Cleanup makefile and related optional files 2009-09-08 09:10:07 -05:00
config.mk 85xx: Move to a common linker script 2009-08-28 17:12:39 -05:00
cpu.c ppc/p4080: Determine various chip frequencies on CoreNet platforms 2009-09-24 12:05:29 -05:00
cpu_init.c ppc/p4080: Handle timebase enabling and frequency reporting 2009-09-24 12:05:29 -05:00
cpu_init_early.c ppc/p4080: CoreNet platfrom style CCSRBAR setting 2009-09-24 12:05:28 -05:00
cpu_init_nand.c ppc/85xx: add cpu init config file for boot from NAND 2009-09-24 12:05:26 -05:00
ddr-gen1.c fsl_dma: Break out common memory initialization function 2009-07-01 23:12:01 -05:00
ddr-gen2.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
ddr-gen3.c ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist 2009-09-08 09:10:04 -05:00
ether_fcc.c ppc/85xx: Cleanup makefile and related optional files 2009-09-08 09:10:07 -05:00
fdt.c ppc/p4080: Handle timebase enabling and frequency reporting 2009-09-24 12:05:29 -05:00
fixed_ivor.S 85xx: Add support for setting IVORs to fixed offset defaults 2009-09-08 09:10:05 -05:00
interrupts.c 85xx: Improve MPIC initialization 2009-08-28 17:12:43 -05:00
mp.c ppc/p4080: CoreNet platfrom style secondary core release 2009-09-24 12:05:28 -05:00
mp.h 85xx: Introduce determine_mp_bootpg() helper. 2009-04-01 15:29:49 -05:00
mpc8536_serdes.c Update Freescale copyrights to remove "All Rights Reserved" 2009-07-29 09:59:22 +02:00
pci.c ppc/85xx: Cleanup makefile and related optional files 2009-09-08 09:10:07 -05:00
qe_io.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
release.S ppc/85xx: Fix enabling of L2 cache 2009-09-24 12:05:27 -05:00
resetvec.S * Patches by Xianghua Xiao, 15 Oct 2003: 2003-10-15 23:53:47 +00:00
serial_scc.c ppc/85xx: Cleanup makefile and related optional files 2009-09-08 09:10:07 -05:00
speed.c ppc/p4080: Determine various chip frequencies on CoreNet platforms 2009-09-24 12:05:29 -05:00
start.S ppc/85xx: add boot from NAND/eSDHC/eSPI support 2009-09-15 21:30:09 -05:00
tlb.c ppc/85xx: add boot from NAND/eSDHC/eSPI support 2009-09-15 21:30:09 -05:00
traps.c ppc/85xx: Remove some bogus code from external interrupt handler. 2009-09-15 21:30:08 -05:00
u-boot-nand.lds ppc/85xx: add boot from NAND/eSDHC/eSPI support 2009-09-15 21:30:09 -05:00
u-boot-nand_spl.lds ppc/85xx: add ld script file for boot from NAND 2009-09-24 12:05:25 -05:00
u-boot.lds 85xx: Ensure BSS segment isn't linked at address 0 2009-10-08 00:33:47 +02:00