32ab1804cd
The cache of Cortex-A7 is only enabled if the SMP bit is set, but the SMP bit of V3s is wrongly left unset, because I thought that it's not SMP-capable. Fix this. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> |
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| .. | ||
| cpu | ||
| dts | ||
| imx-common | ||
| include | ||
| lib | ||
| mach-at91 | ||
| mach-bcm283x | ||
| mach-davinci | ||
| mach-exynos | ||
| mach-highbank | ||
| mach-integrator | ||
| mach-keystone | ||
| mach-kirkwood | ||
| mach-litesom | ||
| mach-meson | ||
| mach-mvebu | ||
| mach-omap2 | ||
| mach-orion5x | ||
| mach-rmobile | ||
| mach-rockchip | ||
| mach-s5pc1xx | ||
| mach-snapdragon | ||
| mach-socfpga | ||
| mach-stm32 | ||
| mach-sunxi | ||
| mach-tegra | ||
| mach-uniphier | ||
| mach-versatile | ||
| mach-zynq | ||
| thumb1/include/asm/proc-armv | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||
| config.mk | ||