Icenowy Zheng 32ab1804cd sunxi: fix SMP bit for V3s SoC ... The cache of Cortex-A7 is only enabled if the SMP bit is set, but the SMP bit of V3s is wrongly left unset, because I thought that it's not SMP-capable. Fix this. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>		2017-08-12 17:24:24 +08:00
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arc	libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY	2016-12-02 20:54:34 -07:00
arm	sunxi: fix SMP bit for V3s SoC	2017-08-12 17:24:24 +08:00
avr32	…
blackfin	…
m68k	…
microblaze	libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY	2016-12-02 20:54:34 -07:00
mips	libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORY	2016-12-02 20:54:34 -07:00
nds32	…
nios2	…
openrisc	…
powerpc	powerpc: Retain compatible property for L2 cache	2016-12-20 09:13:19 -08:00
sandbox	spl: sandbox: Drop spl_board_announce_boot_device()	2016-12-09 08:40:18 -05:00
sh	sh: generate position independent code for all platforms	2016-12-02 21:32:54 -05:00
sparc	…
x86	x86: Use binman all x86 boards	2016-12-20 08:09:55 +13:00
xtensa	…
.gitignore	…
Kconfig	…