uboot/drivers/crypto/fsl
Aneesh Bansal 3a4800a596 drivers/crypto/fsl: fix endianness issue in RNG
For Setting and clearing the bits in SEC Block registers
sec_clrbits32() and sec_setbits32() are used which work as
per endianness of CAAM block.
So these must be used with SEC register address as argument.
If the value is read in a local variable, then the functions
will not behave correctly where endianness of CAAM and core is
different.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
CC: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-15 08:57:35 +08:00
..
Kconfig
Makefile
desc.h
desc_constr.h crypto/fsl: SEC driver cleanup for 64 bit and endianness 2015-10-29 10:33:57 -07:00
error.c
fsl_blob.c
fsl_hash.c crypto/fsl: SEC driver cleanup for 64 bit and endianness 2015-10-29 10:33:57 -07:00
fsl_hash.h
fsl_rsa.c
jobdesc.c
jobdesc.h
jr.c drivers/crypto/fsl: fix endianness issue in RNG 2015-12-15 08:57:35 +08:00
jr.h crypto/fsl: SEC driver cleanup for 64 bit and endianness 2015-10-29 10:33:57 -07:00
rsa_caam.h
sec.c