uboot/arch
Poddar, Sourav 62d206dc31 armv7: hw_data: change clock divider setting.
Clock requirement for qspi clk is 192 Mhz.
According to the below formulae,

f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)

fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz
For clockoutx2_Hmn to be 768, hmn + 1 should be 4.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:51 +05:30
..
arm armv7: hw_data: change clock divider setting. 2013-10-07 17:55:51 +05:30
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