Shengzhou Liu 3fdc827ca8 t2080qds/ddr: update ddr parameters ... - Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s. - Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are unrelated to DDR3/3L. Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2014-01-21 14:02:21 -08:00
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Makefile	…
ddr.c	t2080qds/ddr: update ddr parameters	2014-01-21 14:02:21 -08:00
ddr.h	t2080qds/ddr: update ddr parameters	2014-01-21 14:02:21 -08:00
eth_t2080qds.c	powerpc/t2080qds: some update for t2080qds	2014-01-21 13:37:41 -08:00
law.c	…
pci.c	…
t2080_pbi.cfg	…
t2080_rcw.cfg	…
t2080qds.c	powerpc/t2080qds: some update for t2080qds	2014-01-21 13:37:41 -08:00
t2080qds.h	…
t2080qds_qixis.h	…
tlb.c	…