Cyrille Pitchen 9bcb018870 Revert "sf: Fix quad bit set for micron devices" ... This reverts commit c56ae7519f. Once the 'Quad Enable' bit is cleared in their Enhanced Volatile Configuration Register (EVCR), Micron memories expect ALL commands to use the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer accepted. Within the reverted commit, the write_evcr() function is implemented using the spi_flash_write_common(), which is a shortcut for the [ spi_flash_cmd_write_enable(), spi_flash_cmd_write(), spi_flash_cmd_wait_ready() ] sequence. Since the internal state of the Micron memory has been changed when the spi_flash_cmd_write() function completes, the later call of the spi_flash_cmd_wait_ready() function fails. Indeed the SPI controller driver is not aware of the SPI protocol switch. Further patches will fix the support of Micron QSPI memories. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> [Rebase on master, use JEDEC_MFR(info) in place of idcode0] Signed-off-by: Jagan Teki <jagan@openedev.com>		2016-12-15 18:33:16 +01:00
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nand	NAND: davinci: add support for NAND chips with 16 bits bus	2016-12-03 13:21:15 -05:00
onenand	treewide: replace #include <asm/errno.h> with <linux/errno.h>	2016-09-23 17:55:42 -04:00
spi	Revert "sf: Fix quad bit set for micron devices"	2016-12-15 18:33:16 +01:00
ubi	kconfig: introduce kconfig for UBI	2016-09-26 13:24:43 -04:00
ubispl	…
Kconfig	kconfig: introduce kconfig for UBI	2016-09-26 13:24:43 -04:00
Makefile	…
altera_qspi.c	…
at45.c	…
cfi_flash.c	mtd: cfi_flash: fix indentation	2016-12-04 13:55:01 -05:00
cfi_mtd.c	treewide: replace #include <asm/errno.h> with <linux/errno.h>	2016-09-23 17:55:42 -04:00
dataflash.c	…
ftsmc020.c	…
jedec_flash.c	…
mtd-uclass.c	…
mtd_uboot.c	…
mtdconcat.c	…
mtdcore.c	…
mtdcore.h	…
mtdpart.c	treewide: replace #include <asm/errno.h> with <linux/errno.h>	2016-09-23 17:55:42 -04:00
mw_eeprom.c	…
pic32_flash.c	…
st_smi.c	…
stm32_flash.c	…
stm32_flash.h	…