V3s_Allwinner
/
uboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 2 Wiki Activity
41,252 Commits 2 Branches 2 Tags 115 MiB
Commit Graph

2 Commits

Author SHA1 Message Date
Simon Glass 72cd085aae x86: ivybridge: Add additional LPC init 
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).

Signed-off-by: Simon Glass <sjg@chromium.org>
 2014-11-25 06:34:01 -07:00
Simon Glass 2b6051541b x86: ivybridge: Add early LPC init so that serial works 
The PCH (Platform Controller Hub) includes an LPC (Low Pin Count) device
which provides a serial port. This is accessible on Chromebooks, so enable
it early in the boot process.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2014-11-21 07:34:12 +01:00