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Author SHA1 Message Date
Troy Kisky 1482410531 MX53: DDR: Fix ZQHWCTRL field TZQ_CS 
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
 2012-04-16 14:53:58 +02:00
Liu Hui-R64343 94391fbcee MX5:MX53: add initial support for MX53EVK board 
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been supported.

Signed-off-by: Jason Liu <r64343@freescale.com>
 2011-02-02 00:54:42 +01:00