powerpc/mpc85xx: expand SERDES reference clock select bit
Expand the reference clock select to three bits 000: 100 MHz 001: 125 MHz 010: 156.25MHz 011: 150 MHz 100: 161.1328125 MHz All others reserved Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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arch/powerpc/include/asm
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@ -2415,12 +2415,13 @@ typedef struct serdes_corenet {
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#define SRDS_RSTCTL_RSTERR 0x20000000
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#define SRDS_RSTCTL_SDPD 0x00000020
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u32 pllcr0; /* PLL Control Register 0 */
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#define SRDS_PLLCR0_RFCK_SEL_MASK 0x30000000
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#define SRDS_PLLCR0_RFCK_SEL_MASK 0x70000000
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#define SRDS_PLLCR0_PVCOCNT_EN 0x02000000
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#define SRDS_PLLCR0_RFCK_SEL_100 0x00000000
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#define SRDS_PLLCR0_RFCK_SEL_125 0x10000000
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#define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000
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#define SRDS_PLLCR0_RFCK_SEL_150 0x30000000
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#define SRDS_PLLCR0_RFCK_SEL_161_13 0x40000000
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#define SRDS_PLLCR0_FRATE_SEL_MASK 0x00030000
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#define SRDS_PLLCR0_FRATE_SEL_5 0x00000000
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#define SRDS_PLLCR0_FRATE_SEL_6_25 0x00010000
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