mx1ads: Fix build by using new relocation scheme
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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@ -1,25 +0,0 @@
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#
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# board/mx1ads/config.mk
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#
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# (c) Copyright 2004
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# Techware Information Technology, Inc.
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# http://www.techware.com.tw/
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#
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# Ming-Len Wu <minglen_wu@techware.com.tw>
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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CONFIG_SYS_TEXT_BASE = 0x08400000
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@ -78,7 +78,7 @@ void SetAsynchMode (void)
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static u32 mc9328sid;
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int board_init (void)
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int board_early_init_f(void)
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{
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volatile unsigned int tmp;
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@ -112,10 +112,6 @@ int board_init (void)
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SetAsynchMode ();
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gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
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gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
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icache_enable ();
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dcache_enable ();
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@ -133,6 +129,15 @@ int board_init (void)
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
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gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
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return 0;
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}
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int board_late_init (void)
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{
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@ -161,12 +166,18 @@ int board_late_init (void)
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return 0;
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}
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int dram_init (void)
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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@ -156,6 +156,16 @@
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#define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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#define CONFIG_SYS_TEXT_BASE 0x10000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_GBL_DATA_OFFSET)
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */
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#define CONFIG_SYS_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */
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#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */
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