x86: Add a script to aid code conversion from coreboot
It is useful to automate the process of converting code from coreboot a little. Add a sed script which performs some common transformations. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
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@ -864,6 +864,15 @@ PCIe root port's configuration registers will cause system hang while it is
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held in reset. For more details, check how they are implemented by the Intel
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held in reset. For more details, check how they are implemented by the Intel
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Galileo board support codes in board/intel/galileo/galileo.c.
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Galileo board support codes in board/intel/galileo/galileo.c.
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coreboot:
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See scripts/coreboot.sed which can assist with porting coreboot code into
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U-Boot drivers. It will not resolve all build errors, but will perform common
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transformations. Remember to add attribution to coreboot for new files added
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to U-Boot. This should go at the top of each file and list the coreboot
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filename where the code originated.
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TODO List
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TODO List
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---------
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---------
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- Audio
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- Audio
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@ -0,0 +1,17 @@
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#
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# Copyright (c) 2016 Google, Inc
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Script to convert coreboot code to something similar to what U-Boot uses
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# sed -f coreboot.sed <coreboot_file.c>
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# Remember to add attribution to coreboot for new files added to U-Boot.
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s/REG_RES_WRITE32(\(.*\), \(.*\), \(.*\)),/writel(\3, base + \2);/
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s/REG_RES_POLL32(\(.*\), \(.*\), \(.*\), \(.*\), \(.*\)),/ret = poll32(base + \2, \3, \4, \5);/
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s/REG_RES_OR32(\(.*\), \(.*\), \(.*\)),/setbits_le32(base + \2, \3);/
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s/REG_RES_RMW32(\(.*\), \(.*\), \(.*\), \(.*\)),/clrsetbits_le32(base + \2, ~\3, \4);/
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/REG_SCRIPT_END/d
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s/read32/readl/
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s/write32(\(.*\), \(.*\))/writel(\2, \1)/
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s/conf->/plat->/
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s/static const struct reg_script \(.*\)_script\[\] = {/static int \1(struct udevice *dev)/
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