dm: spi: Correct status register access width
The status register on ICH9 is a single byte, so use byte access when writing to it, to avoid updating the control register also. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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@ -411,6 +411,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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const void *dout, void *din, unsigned long flags)
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{
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{
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struct udevice *bus = dev_get_parent(dev);
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struct udevice *bus = dev_get_parent(dev);
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struct ich_spi_platdata *plat = dev_get_platdata(bus);
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struct ich_spi_priv *ctlr = dev_get_priv(bus);
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struct ich_spi_priv *ctlr = dev_get_priv(bus);
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uint16_t control;
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uint16_t control;
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int16_t opcode_index;
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int16_t opcode_index;
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@ -477,7 +478,10 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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if (plat->ich_version == 7)
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ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
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ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
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else
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ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
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spi_setup_type(trans, using_cmd ? bytes : 0);
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spi_setup_type(trans, using_cmd ? bytes : 0);
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opcode_index = spi_setup_opcode(ctlr, trans);
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opcode_index = spi_setup_opcode(ctlr, trans);
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