x86: gpio: Tidy up gpio_ich6_get_base() and callers
This function can return an error. Correct the detection of this error so that it works even with large 32-bit addresses. The return value is set up for returning an I/O address but the function is also used to return a memory-mapped address. Adjust the return code to make this work. Also add a bit more debugging. Signed-off-by: Simon Glass <sjg@chromium.org>
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@ -75,7 +75,7 @@ static int gpio_ich6_get_base(unsigned long base)
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/* Is the device present? */
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/* Is the device present? */
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tmpword = x86_pci_read_config16(pci_dev, PCI_VENDOR_ID);
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tmpword = x86_pci_read_config16(pci_dev, PCI_VENDOR_ID);
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if (tmpword != PCI_VENDOR_ID_INTEL) {
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if (tmpword != PCI_VENDOR_ID_INTEL) {
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debug("%s: wrong VendorID\n", __func__);
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debug("%s: wrong VendorID %x\n", __func__, tmpword);
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return -ENODEV;
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return -ENODEV;
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}
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}
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@ -144,7 +144,7 @@ static int gpio_ich6_get_base(unsigned long base)
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* at the offset that we just read. Bit 0 indicates that it's
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* at the offset that we just read. Bit 0 indicates that it's
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* an I/O address, not a memory address, so mask that off.
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* an I/O address, not a memory address, so mask that off.
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*/
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*/
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return tmplong & 0xfffc;
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return tmplong & 1 ? tmplong & ~3 : tmplong & ~15;
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}
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}
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static int _ich6_gpio_set_value(uint16_t base, unsigned offset, int value)
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static int _ich6_gpio_set_value(uint16_t base, unsigned offset, int value)
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@ -324,7 +324,7 @@ int gpio_ich6_pinctrl_init(void)
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debug("%s: io-base offset not present\n", __func__);
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debug("%s: io-base offset not present\n", __func__);
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} else {
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} else {
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iobase = gpio_ich6_get_base(iobase_offset);
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iobase = gpio_ich6_get_base(iobase_offset);
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if (iobase < 0) {
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if (IS_ERR_VALUE(iobase)) {
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debug("%s: invalid IOBASE address (%08x)\n", __func__,
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debug("%s: invalid IOBASE address (%08x)\n", __func__,
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iobase);
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iobase);
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return -EINVAL;
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return -EINVAL;
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