mxc_i2c: specify i2c base address in config file

The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
and mx53loco.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Troy Kisky 2012-04-24 17:33:25 +00:00 committed by Heiko Schocher
parent 211e47549b
commit de6f604de2
10 changed files with 20 additions and 29 deletions

View File

@ -606,6 +606,13 @@ struct esdc_regs {
#define UART4_BASE 0x43FB0000 #define UART4_BASE 0x43FB0000
#define UART5_BASE 0x43FB4000 #define UART5_BASE 0x43FB4000
#define I2C1_BASE_ADDR 0x43f80000
#define I2C1_CLK_OFFSET 26
#define I2C2_BASE_ADDR 0x43F98000
#define I2C2_CLK_OFFSET 28
#define I2C3_BASE_ADDR 0x43f84000
#define I2C3_CLK_OFFSET 30
#define ESDCTL_SDE (1 << 31) #define ESDCTL_SDE (1 << 31)
#define ESDCTL_CMD_RW (0 << 28) #define ESDCTL_CMD_RW (0 << 28)
#define ESDCTL_CMD_PRECHARGE (1 << 28) #define ESDCTL_CMD_PRECHARGE (1 << 28)

View File

@ -39,7 +39,7 @@
#define MAX_BASE_ADDR 0x43F04000 #define MAX_BASE_ADDR 0x43F04000
#define EVTMON_BASE_ADDR 0x43F08000 #define EVTMON_BASE_ADDR 0x43F08000
#define CLKCTL_BASE_ADDR 0x43F0C000 #define CLKCTL_BASE_ADDR 0x43F0C000
#define I2C_BASE_ADDR 0x43F80000 #define I2C1_BASE_ADDR 0x43F80000
#define I2C3_BASE_ADDR 0x43F84000 #define I2C3_BASE_ADDR 0x43F84000
#define ATA_BASE_ADDR 0x43F8C000 #define ATA_BASE_ADDR 0x43F8C000
#define UART1_BASE 0x43F90000 #define UART1_BASE 0x43F90000

View File

@ -59,27 +59,10 @@ struct mxc_i2c_regs {
#define I2SR_IIF (1 << 1) #define I2SR_IIF (1 << 1)
#define I2SR_RX_NO_AK (1 << 0) #define I2SR_RX_NO_AK (1 << 0)
#if defined(CONFIG_SYS_I2C_MX31_PORT1) #ifdef CONFIG_SYS_I2C_BASE
#define I2C_BASE 0x43f80000 #define I2C_BASE CONFIG_SYS_I2C_BASE
#define I2C_CLK_OFFSET 26
#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
#define I2C_BASE 0x43f98000
#define I2C_CLK_OFFSET 28
#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
#define I2C_BASE 0x43f84000
#define I2C_CLK_OFFSET 30
#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
#define I2C_BASE I2C1_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
#define I2C_BASE I2C2_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
#define I2C_BASE I2C_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX35_PORT2)
#define I2C_BASE I2C2_BASE_ADDR
#elif defined(CONFIG_SYS_I2C_MX35_PORT3)
#define I2C_BASE I2C3_BASE_ADDR
#else #else
#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver" #error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
#endif #endif
#define I2C_MAX_TIMEOUT 10000 #define I2C_MAX_TIMEOUT 10000
@ -114,7 +97,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
(struct clock_control_regs *)CCM_BASE; (struct clock_control_regs *)CCM_BASE;
/* start the required I2C clock */ /* start the required I2C clock */
writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET), writel(readl(&sc_regs->cgr0) | (3 << CONFIG_SYS_I2C_CLK_OFFSET),
&sc_regs->cgr0); &sc_regs->cgr0);
#endif #endif

View File

@ -66,7 +66,7 @@
*/ */
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX35_PORT3 #define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0xfe #define CONFIG_SYS_I2C_SLAVE 0xfe
#define CONFIG_MXC_SPI #define CONFIG_MXC_SPI

View File

@ -54,7 +54,8 @@
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX31_PORT2 #define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_MXC_UART #define CONFIG_MXC_UART

View File

@ -57,7 +57,7 @@
*/ */
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX35_PORT1 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_MXC_SPI #define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO #define CONFIG_MXC_GPIO

View File

@ -50,7 +50,7 @@
#define CONFIG_CMD_I2C #define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT2 #define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */ /* MMC Configs */

View File

@ -53,7 +53,7 @@
#define CONFIG_CMD_I2C #define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT2 1 #define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
/* PMIC Configs */ /* PMIC Configs */

View File

@ -89,7 +89,7 @@
/* I2C Configs */ /* I2C Configs */
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT1 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
/* PMIC Controller */ /* PMIC Controller */

View File

@ -50,7 +50,7 @@
#define CONFIG_CMD_I2C #define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C #define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC #define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX53_PORT2 #define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */ /* MMC Configs */