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MX5: Add definitions for SATA controller 

Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
This commit is contained in:
Stefano Babic 2012-02-22 00:24:36 +00:00 committed by Albert ARIBAUD
parent b774fe9d8a
commit d87c85ce43
3 changed files with 4 additions and 0 deletions
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2
arch/arm/cpu/armv7/mx5/clock.c
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@ -380,6 +380,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_FEC_CLK: case MXC_FEC_CLK:
return decode_pll(mxc_plls[PLL1_CLOCK], return decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_SYS_MX5_HCLK); CONFIG_SYS_MX5_HCLK);
case MXC_SATA_CLK:
return get_ahb_clk();
default: default:
break; break;
} }

1
arch/arm/include/asm/arch-mx5/clock.h
View File

@ -32,6 +32,7 @@ enum mxc_clock {
MXC_UART_CLK, MXC_UART_CLK,
MXC_CSPI_CLK, MXC_CSPI_CLK,
MXC_FEC_CLK, MXC_FEC_CLK,
MXC_SATA_CLK,
}; };
unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref); unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);

1
arch/arm/include/asm/arch-mx5/imx-regs.h
View File

@ -43,6 +43,7 @@
#define NFC_BASE_ADDR_AXI 0xF7FF0000 #define NFC_BASE_ADDR_AXI 0xF7FF0000
#define IRAM_BASE_ADDR 0xF8000000 #define IRAM_BASE_ADDR 0xF8000000
#define CS1_BASE_ADDR 0xF4000000 #define CS1_BASE_ADDR 0xF4000000
#define SATA_BASE_ADDR 0x10000000
#else #else
#error "CPU_TYPE not defined" #error "CPU_TYPE not defined"
#endif #endif