zynq: Add support for U-BOOT SPL
SPL is using ps7_init.c/h files which are generated from design tools which have to be copied to boards/xilinx/zynq folder before compilation. BSS section is moved to SDRAM because fat support requires more space than SRAM size. Added: - MMC and QSPI support - Boot OS directly from SPL - Enable SPL command Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
This commit is contained in:
Michal Simek
parent
96a5d4dc1e
commit
d7e269cfbd
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@ -13,3 +13,4 @@ obj-y += cpu.o
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obj-y += ddrc.o
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obj-y += slcr.o
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obj-y += clk.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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@ -17,7 +17,7 @@ void lowlevel_init(void)
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int arch_cpu_init(void)
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{
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zynq_slcr_unlock();
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#ifndef CONFIG_SPL_BUILD
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/* Device config APB, unlock the PCAP */
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writel(0x757BDF0D, &devcfg_base->unlock);
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writel(0xFFFFFFFF, &devcfg_base->rom_shadow);
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@ -35,7 +35,7 @@ int arch_cpu_init(void)
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/* Urgent write, ports S2/S3 */
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writel(0xC, &slcr_base->ddr_urgent);
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#endif
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#endif
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zynq_clk_early_init();
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zynq_slcr_lock();
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@ -0,0 +1,69 @@
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/*
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* (C) Copyright 2014 Xilinx, Inc. Michal Simek
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spl.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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void board_init_f(ulong dummy)
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{
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ps7_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* Set global data pointer. */
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gd = &gdata;
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preloader_console_init();
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arch_cpu_init();
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board_init_r(NULL, 0);
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}
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u32 spl_boot_device(void)
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{
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u32 mode;
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switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
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#ifdef CONFIG_SPL_SPI_SUPPORT
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case ZYNQ_BM_QSPI:
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puts("qspi boot\n");
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mode = BOOT_DEVICE_SPI;
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break;
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#endif
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#ifdef CONFIG_SPL_MMC_SUPPORT
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case ZYNQ_BM_SD:
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puts("mmc boot\n");
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mode = BOOT_DEVICE_MMC1;
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break;
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#endif
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default:
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puts("Unsupported boot mode selected\n");
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hang();
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}
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return mode;
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}
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#ifdef CONFIG_SPL_MMC_SUPPORT
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u32 spl_boot_mode(void)
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{
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return MMCSD_MODE_FAT;
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}
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#endif
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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/* boot linux */
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return 0;
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}
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#endif
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@ -0,0 +1,61 @@
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/*
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* Copyright (c) 2014 Xilinx, Inc. Michal Simek
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* Copyright (c) 2004-2008 Texas Instruments
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
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LENGTH = CONFIG_SPL_MAX_SIZE }
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MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
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LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = ALIGN(4);
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.text :
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{
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__image_copy_start = .;
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CPUDIR/start.o (.text*)
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*(.text*)
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} > .sram
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. = ALIGN(4);
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.rodata : {
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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} > .sram
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. = ALIGN(4);
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.data : {
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*(.data*)
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} > .sram
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. = ALIGN(4);
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. = .;
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__image_copy_end = .;
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_end = .;
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/* Move BSS section to RAM because of FAT */
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.bss (NOLOAD) : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(4);
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__bss_end = .;
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} > .sdram
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/DISCARD/ : { *(.dynsym) }
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/DISCARD/ : { *(.dynstr*) }
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/DISCARD/ : { *(.dynamic*) }
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/DISCARD/ : { *(.plt*) }
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/DISCARD/ : { *(.interp*) }
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/DISCARD/ : { *(.gnu*) }
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}
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@ -0,0 +1,18 @@
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/*
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* (C) Copyright 2014 Xilinx, Inc. Michal Simek
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_SPL_H_
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#define _ASM_ARCH_SPL_H_
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extern void ps7_init(void);
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#define BOOT_DEVICE_NONE 0
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#define BOOT_DEVICE_RAM 1
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#define BOOT_DEVICE_SPI 2
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#define BOOT_DEVICE_MMC1 3
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#define BOOT_DEVICE_MMC2 4
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#define BOOT_DEVICE_MMC2_2 5
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#endif
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@ -6,3 +6,4 @@
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#
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obj-y := board.o
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obj-$(CONFIG_SPL_BUILD) += ps7_init.o
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@ -0,0 +1,12 @@
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/*
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* (C) Copyright 2014 Xilinx, Inc. Michal Simek
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/spl.h>
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__weak void ps7_init(void)
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{
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puts("Please copy ps7_init.c/h from hw project\n");
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}
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@ -228,4 +228,81 @@
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_TFTPPUT
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/* SPL part */
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#define CONFIG_SPL
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#define CONFIG_CMD_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
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/* Disable dcache for SPL just for sure */
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_DCACHE_OFF
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#undef CONFIG_FPGA
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#endif
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/* MMC support */
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#ifdef CONFIG_ZYNQ_SDHCI0
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#endif
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/* Address in RAM where the parameters must be copied by SPL. */
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
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#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb"
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#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
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/* Not using MMC raw mode - just for compilation purpose */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
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/* qspi mode is working fine */
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#ifdef CONFIG_ZYNQ_QSPI
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SPL_SPI_BUS 0
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
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#define CONFIG_SPL_SPI_CS 0
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#endif
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/* for booting directly linux */
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#define CONFIG_SPL_OS_BOOT
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/* SP location before relocation, must use scratch RAM */
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#define CONFIG_SPL_TEXT_BASE 0x0
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/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
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#define CONFIG_SPL_MAX_SIZE 0x30000
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/* The highest 64k OCM address */
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#define OCM_HIGH_ADDR 0xffff0000
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/* Just define any reasonable size */
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#define CONFIG_SPL_STACK_SIZE 0x1000
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/* SPL stack position - and stack goes down */
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#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
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/* On the top of OCM space */
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#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
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/* BSS setup */
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#define CONFIG_SPL_BSS_START_ADDR 0x100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#endif /* __CONFIG_ZYNQ_COMMON_H */
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