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colibri_t20: fix usb operation and controller order 

Without this patch the following error will be shown:

Colibri T20 # usb start
starting USB...
No controllers found

This patch fixes USB operation and also the controller order as the
CI UDC driver may only be instantiated on the first aka OTG port.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Marcel Ziswiler 2016-09-28 11:24:09 +02:00 committed by Tom Warren
parent 28f224a52f
commit d5a24d8b53
1 changed files with 24 additions and 22 deletions
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46
arch/arm/dts/tegra20-colibri.dts
View File

@ -14,10 +14,10 @@
i2c0 = "/i2c@7000d000"; i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000"; i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400"; i2c2 = "/i2c@7000c400";
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
usb2 = "/usb@c5004000";
mmc0 = "/sdhci@c8000600"; mmc0 = "/sdhci@c8000600";
usb0 = "/usb@c5000000";
usb1 = "/usb@c5004000"; /* on-module only, for ASIX */
usb2 = "/usb@c5008000";
}; };
host1x@50000000 { host1x@50000000 {
@ -43,25 +43,6 @@
}; };
}; };
usb@c5000000 {
statuc = "okay";
dr_mode = "otg";
};
usb@c5004000 {
statuc = "okay";
/* VBUS_LAN */
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>;
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
};
usb@c5008000 {
statuc = "okay";
/* USBH_PEN */
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
};
nand-controller@70008000 { nand-controller@70008000 {
nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>; nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
nvidia,width = <8>; nvidia,width = <8>;
@ -102,6 +83,27 @@
clock-frequency = <100000>; clock-frequency = <100000>;
}; };
/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
usb@c5000000 {
status = "okay";
dr_mode = "otg";
};
/* EHCI instance 1: ULPI -> USB3340 -> AX88772B */
usb@c5004000 {
status = "okay";
/* VBUS_LAN */
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
};
/* EHCI instance 2: USB3_DP/N -> USBH_P/N */
usb@c5008000 {
status = "okay";
/* USBH_PEN */
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
};
sdhci@c8000600 { sdhci@c8000600 {
status = "okay"; status = "okay";
bus-width = <4>; bus-width = <4>;