Add support for the tms320671x host port interface (HPI)
This commit is contained in:
Markus Klotzbuecher
Markus Klotzbuecher
parent
f4eb54529b
commit
d28707dbce
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS = $(BOARD).o
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COBJS = $(BOARD).o hpi.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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@ -0,0 +1,604 @@
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/*
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* (C) Copyright 2006
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* Markus Klotzbuecher, DENX Software Engineering, mk@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Host Port Interface (HPI)
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*/
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/* debug levels:
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* 0 : errors
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* 1 : usefull info
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* 2 : lots of info
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* 3 : noisy
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*/
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#define DEBUG 0
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#include <config.h>
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#include <common.h>
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#include <mpc8xx.h>
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#include "pld.h"
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#include "hpi.h"
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#include "spc1920.h" /* led function */
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#define _NOT_USED_ 0xFFFFFFFF
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/* original table:
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* - inserted loops to achieve long CS low and high Periods (~217ns)
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* - move cs high 2/4 to the right
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*/
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const uint dsp_table_slow[] =
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{
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/* single read (offset 0x00 in upm ram) */
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0x8fffdc04, 0x0fffdc84, 0x0fffdc84, 0x0fffdc00,
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0x3fffdc04, 0xffffdc84, 0xffffdc84, 0xffffdc05,
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/* burst read (offset 0x08 in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* single write (offset 0x18 in upm ram) */
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0x8fffd004, 0x0fffd084, 0x0fffd084, 0x3fffd000,
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0xffffd084, 0xffffd084, 0xffffd005, _NOT_USED_,
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/* burst write (offset 0x20 in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* refresh (offset 0x30 in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* exception (offset 0x3C in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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};
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/* dsp hpi upm ram table
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* works fine for noninc access, failes on incremental.
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* - removed first word
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*/
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const uint dsp_table_fast[] =
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{
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/* single read (offset 0x00 in upm ram) */
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0x8fffdc04, 0x0fffdc04, 0x0fffdc00, 0x3fffdc04,
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0xffffdc05, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* burst read (offset 0x08 in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* single write (offset 0x18 in upm ram) */
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0x8fffd004, 0x0fffd004, 0x3fffd000, 0xffffd005,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* burst write (offset 0x20 in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* refresh (offset 0x30 in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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/* exception (offset 0x3C in upm ram) */
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
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};
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#ifdef CONFIG_SPC1920_HPI_TEST
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#undef HPI_TEST_OSZI
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#define HPI_TEST_CHUNKSIZE 0x1000
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#define HPI_TEST_PATTERN 0x00000000
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#define HPI_TEST_START 0x0
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#define HPI_TEST_END 0x30000
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#define TINY_AUTOINC_DATA_SIZE 16 /* 32bit words */
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#define TINY_AUTOINC_BASE_ADDR 0x0
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static int hpi_activate(void);
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static void hpi_inactivate(void);
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static void dsp_reset(void);
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static int hpi_write_inc(u32 addr, u32 *data, u32 count);
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static int hpi_read_inc(u32 addr, u32 *buf, u32 count);
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static int hpi_write_noinc(u32 addr, u32 data);
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static u32 hpi_read_noinc(u32 addr);
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int hpi_test(void);
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static int hpi_write_addr_test(u32 addr);
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static int hpi_read_write_test(u32 addr, u32 data);
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static int hpi_tiny_autoinc_test(void);
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#endif /* CONFIG_SPC1920_HPI_TEST */
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/* init the host port interface on UPMA */
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int hpi_init(void)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immr->im_memctl;
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
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upmconfig(UPMA, (uint *)dsp_table_slow, sizeof(dsp_table_slow)/sizeof(uint));
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udelay(100);
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memctl->memc_mamr = CFG_MAMR;
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memctl->memc_or3 = CFG_OR3_PRELIM;
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memctl->memc_br3 = CFG_BR3_PRELIM;
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/* reset dsp */
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dsp_reset();
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/* activate hpi switch*/
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pld->dsp_hpi_on = 0x1;
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udelay(100);
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return 0;
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}
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#ifdef CONFIG_SPC1920_HPI_TEST
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/* activate the Host Port interface */
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static int hpi_activate(void)
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{
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
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/* turn on hpi */
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pld->dsp_hpi_on = 0x1;
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udelay(5);
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/* turn on the power EN_DSP_POWER high*/
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/* currently always on TBD */
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/* setup hpi control register */
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HPI_HPIC_1 = (u16) 0x0008;
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HPI_HPIC_2 = (u16) 0x0008;
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udelay(100);
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return 0;
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}
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/* turn off the host port interface */
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static void hpi_inactivate(void)
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{
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
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/* deactivate hpi */
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pld->dsp_hpi_on = 0x0;
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/* reset the dsp */
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/* pld->dsp_reset = 0x0; */
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/* turn off the power EN_DSP_POWER# high*/
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/* currently always on TBD */
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}
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/* reset the DSP */
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static void dsp_reset(void)
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{
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE;
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pld->dsp_reset = 0x1;
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pld->dsp_hpi_on = 0x0;
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udelay(300000);
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pld->dsp_reset = 0x0;
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pld->dsp_hpi_on = 0x1;
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}
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/* write using autoinc (count is number of 32bit words) */
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static int hpi_write_inc(u32 addr, u32 *data, u32 count)
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{
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int i;
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u16 addr1, addr2;
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
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addr2 = (u16) (addr & 0xffff);
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/* write address */
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HPI_HPIA_1 = addr1;
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HPI_HPIA_2 = addr2;
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debugX(4, "writing from data=0x%x to 0x%x\n", data, (data+count));
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for(i=0; i<count; i++) {
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HPI_HPID_INC_1 = (u16) ((data[i] >> 16) & 0xffff);
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HPI_HPID_INC_2 = (u16) (data[i] & 0xffff);
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debugX(4, "hpi_write_inc: data1=0x%x, data2=0x%x\n",
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(u16) ((data[i] >> 16) & 0xffff),
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(u16) (data[i] & 0xffff));
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}
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#if 0
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while(data_ptr < (u16*) (data + count)) {
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HPI_HPID_INC_1 = *(data_ptr++);
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HPI_HPID_INC_2 = *(data_ptr++);
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}
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#endif
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/* return number of bytes written */
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return count;
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}
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/*
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* read using autoinc (count is number of 32bit words)
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*/
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static int hpi_read_inc(u32 addr, u32 *buf, u32 count)
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{
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int i;
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u16 addr1, addr2, data1, data2;
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
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addr2 = (u16) (addr & 0xffff);
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/* write address */
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HPI_HPIA_1 = addr1;
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HPI_HPIA_2 = addr2;
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for(i=0; i<count; i++) {
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data1 = HPI_HPID_INC_1;
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data2 = HPI_HPID_INC_2;
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debugX(4, "hpi_read_inc: data1=0x%x, data2=0x%x\n", data1, data2);
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buf[i] = (((u32) data1) << 16) | (data2 & 0xffff);
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}
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#if 0
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while(buf_ptr < (u16*) (buf + count)) {
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*(buf_ptr++) = HPI_HPID_INC_1;
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*(buf_ptr++) = HPI_HPID_INC_2;
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}
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#endif
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/* return number of bytes read */
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return count;
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}
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/* write to non- auto inc regs */
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static int hpi_write_noinc(u32 addr, u32 data)
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{
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u16 addr1, addr2, data1, data2;
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
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addr2 = (u16) (addr & 0xffff);
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/* printf("hpi_write_noinc: addr1=0x%x, addr2=0x%x\n", addr1, addr2); */
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HPI_HPIA_1 = addr1;
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HPI_HPIA_2 = addr2;
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data1 = (u16) ((data >> 16) & 0xffff);
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data2 = (u16) (data & 0xffff);
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/* printf("hpi_write_noinc: data1=0x%x, data2=0x%x\n", data1, data2); */
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HPI_HPID_NOINC_1 = data1;
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HPI_HPID_NOINC_2 = data2;
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return 0;
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}
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/* read from non- auto inc regs */
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static u32 hpi_read_noinc(u32 addr)
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{
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u16 addr1, addr2, data1, data2;
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u32 ret;
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */
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addr2 = (u16) (addr & 0xffff);
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HPI_HPIA_1 = addr1;
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HPI_HPIA_2 = addr2;
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/* printf("hpi_read_noinc: addr1=0x%x, addr2=0x%x\n", addr1, addr2); */
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data1 = HPI_HPID_NOINC_1;
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data2 = HPI_HPID_NOINC_2;
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/* printf("hpi_read_noinc: data1=0x%x, data2=0x%x\n", data1, data2); */
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ret = (((u32) data1) << 16) | (data2 & 0xffff);
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return ret;
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}
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/*
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* Host Port Interface Tests
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*/
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#ifndef HPI_TEST_OSZI
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/* main test function */
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int hpi_test(void)
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{
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int err = 0;
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u32 i, ii, pattern, tmp;
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pattern = HPI_TEST_PATTERN;
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u32 test_data[HPI_TEST_CHUNKSIZE];
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u32 read_data[HPI_TEST_CHUNKSIZE];
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debugX(2, "hpi_test: activating hpi...");
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hpi_activate();
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debugX(2, "OK.\n");
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#if 0
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/* Dump the first 1024 bytes
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*
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*/
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for(i=0; i<1024; i+=4) {
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if(i%16==0)
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printf("\n0x%08x: ", i);
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printf("0x%08x ", hpi_read_noinc(i));
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}
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#endif
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/* HPIA read-write test
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*
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*/
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debugX(1, "hpi_test: starting HPIA read-write tests...\n");
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err |= hpi_write_addr_test(0xdeadc0de);
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err |= hpi_write_addr_test(0xbeefd00d);
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err |= hpi_write_addr_test(0xabcd1234);
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err |= hpi_write_addr_test(0xaaaaaaaa);
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if(err) {
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debugX(1, "hpi_test: HPIA read-write tests: *** FAILED ***\n");
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return -1;
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}
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debugX(1, "hpi_test: HPIA read-write tests: OK\n");
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/* read write test using nonincremental data regs
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*
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*/
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debugX(1, "hpi_test: starting nonincremental tests...\n");
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for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) {
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err |= hpi_read_write_test(i, pattern);
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/* stolen from cmd_mem.c */
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if(pattern & 0x80000000) {
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pattern = -pattern; /* complement & increment */
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} else {
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pattern = ~pattern;
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}
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err |= hpi_read_write_test(i, pattern);
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if(err) {
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debugX(1, "hpi_test: nonincremental tests *** FAILED ***\n");
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return -1;
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}
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}
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debugX(1, "hpi_test: nonincremental test OK\n");
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/* read write a chunk of data using nonincremental data regs
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*
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*/
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debugX(1, "hpi_test: starting nonincremental chunk tests...\n");
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pattern = HPI_TEST_PATTERN;
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for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) {
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hpi_write_noinc(i, pattern);
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/* stolen from cmd_mem.c */
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if(pattern & 0x80000000) {
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pattern = -pattern; /* complement & increment */
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} else {
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pattern = ~pattern;
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}
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}
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pattern = HPI_TEST_PATTERN;
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for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) {
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tmp = hpi_read_noinc(i);
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if(tmp != pattern) {
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debugX(1, "hpi_test: noninc chunk test *** FAILED *** @ 0x%x, written=0x%x, read=0x%x\n", i, pattern, tmp);
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err = -1;
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}
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/* stolen from cmd_mem.c */
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if(pattern & 0x80000000) {
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pattern = -pattern; /* complement & increment */
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} else {
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pattern = ~pattern;
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}
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}
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if(err)
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return -1;
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debugX(1, "hpi_test: nonincremental chunk test OK\n");
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#ifdef DO_TINY_TEST
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/* small verbose test using autoinc and nonautoinc to compare
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*
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*/
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debugX(1, "hpi_test: tiny_autoinc_test...\n");
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hpi_tiny_autoinc_test();
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debugX(1, "hpi_test: tiny_autoinc_test done\n");
|
||||
#endif /* DO_TINY_TEST */
|
||||
|
||||
|
||||
/* $%& write a chunk of data using the autoincremental regs
|
||||
*
|
||||
*/
|
||||
debugX(1, "hpi_test: starting autoinc test %d chunks with 0x%x bytes...\n",
|
||||
((HPI_TEST_END - HPI_TEST_START) / HPI_TEST_CHUNKSIZE),
|
||||
HPI_TEST_CHUNKSIZE);
|
||||
|
||||
for(i=HPI_TEST_START;
|
||||
i < ((HPI_TEST_END - HPI_TEST_START) / HPI_TEST_CHUNKSIZE);
|
||||
i++) {
|
||||
/* generate the pattern data */
|
||||
debugX(3, "generating pattern data: ");
|
||||
for(ii = 0; ii < HPI_TEST_CHUNKSIZE; ii++) {
|
||||
debugX(3, "0x%x ", pattern);
|
||||
|
||||
test_data[ii] = pattern;
|
||||
read_data[ii] = 0x0; /* zero to be sure */
|
||||
|
||||
/* stolen from cmd_mem.c */
|
||||
if(pattern & 0x80000000) {
|
||||
pattern = -pattern; /* complement & increment */
|
||||
} else {
|
||||
pattern = ~pattern;
|
||||
}
|
||||
}
|
||||
debugX(3, "done\n");
|
||||
|
||||
debugX(2, "Writing autoinc data @ 0x%x\n", i);
|
||||
hpi_write_inc(i, test_data, HPI_TEST_CHUNKSIZE);
|
||||
|
||||
debugX(2, "Reading autoinc data @ 0x%x\n", i);
|
||||
hpi_read_inc(i, read_data, HPI_TEST_CHUNKSIZE);
|
||||
|
||||
/* compare */
|
||||
for(ii = 0; ii < HPI_TEST_CHUNKSIZE; ii++) {
|
||||
debugX(3, "hpi_test_autoinc: @ 0x%x, written=0x%x, read=0x%x", i+ii, test_data[ii], read_data[ii]);
|
||||
if(read_data[ii] != test_data[ii]) {
|
||||
debugX(0, "hpi_test: autoinc test @ 0x%x, written=0x%x, read=0x%x *** FAILED ***\n", i+ii, test_data[ii], read_data[ii]);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
debugX(1, "hpi_test: autoinc test OK\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else /* HPI_TEST_OSZI */
|
||||
int hpi_test(void)
|
||||
{
|
||||
int i;
|
||||
u32 read_data[TINY_AUTOINC_DATA_SIZE];
|
||||
|
||||
unsigned int dummy_data[TINY_AUTOINC_DATA_SIZE] = {
|
||||
0x11112222, 0x33334444, 0x55556666, 0x77778888,
|
||||
0x9999aaaa, 0xbbbbcccc, 0xddddeeee, 0xffff1111,
|
||||
0x00010002, 0x00030004, 0x00050006, 0x00070008,
|
||||
0x0009000a, 0x000b000c, 0x000d000e, 0x000f0001
|
||||
};
|
||||
|
||||
debugX(0, "hpi_test: activating hpi...");
|
||||
hpi_activate();
|
||||
debugX(0, "OK.\n");
|
||||
|
||||
while(1) {
|
||||
led9(1);
|
||||
debugX(0, " writing to autoinc...\n");
|
||||
hpi_write_inc(TINY_AUTOINC_BASE_ADDR,
|
||||
dummy_data, TINY_AUTOINC_DATA_SIZE);
|
||||
|
||||
debugX(0, " reading from autoinc...\n");
|
||||
hpi_read_inc(TINY_AUTOINC_BASE_ADDR,
|
||||
read_data, TINY_AUTOINC_DATA_SIZE);
|
||||
|
||||
for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) {
|
||||
debugX(0, " written=0x%x, read(inc)=0x%x\n",
|
||||
dummy_data[i], read_data[i]);
|
||||
}
|
||||
led9(0);
|
||||
udelay(2000000);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* test if Host Port Address Register can be written correctly */
|
||||
static int hpi_write_addr_test(u32 addr)
|
||||
{
|
||||
u32 read_back;
|
||||
/* write address */
|
||||
HPI_HPIA_1 = ((u16) (addr >> 16)); /* First HW is most significant */
|
||||
HPI_HPIA_2 = ((u16) addr);
|
||||
|
||||
read_back = (((u32) HPI_HPIA_1)<<16) | ((u32) HPI_HPIA_2);
|
||||
|
||||
if(read_back == addr) {
|
||||
debugX(2, " hpi_write_addr_test OK: written=0x%x, read=0x%x\n",
|
||||
addr, read_back);
|
||||
return 0;
|
||||
} else {
|
||||
debugX(0, " hpi_write_addr_test *** FAILED ***: written=0x%x, read=0x%x\n",
|
||||
addr, read_back);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* test if a simple read/write sequence succeeds */
|
||||
static int hpi_read_write_test(u32 addr, u32 data)
|
||||
{
|
||||
u32 read_back;
|
||||
|
||||
hpi_write_noinc(addr, data);
|
||||
read_back = hpi_read_noinc(addr);
|
||||
|
||||
if(read_back == data) {
|
||||
debugX(2, " hpi_read_write_test: OK, addr=0x%x written=0x%x, read=0x%x\n", addr, data, read_back);
|
||||
return 0;
|
||||
} else {
|
||||
debugX(0, " hpi_read_write_test: *** FAILED ***, addr=0x%x written=0x%x, read=0x%x\n", addr, data, read_back);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hpi_tiny_autoinc_test(void)
|
||||
{
|
||||
int i;
|
||||
u32 read_data[TINY_AUTOINC_DATA_SIZE];
|
||||
u32 read_data_noinc[TINY_AUTOINC_DATA_SIZE];
|
||||
|
||||
unsigned int dummy_data[TINY_AUTOINC_DATA_SIZE] = {
|
||||
0x11112222, 0x33334444, 0x55556666, 0x77778888,
|
||||
0x9999aaaa, 0xbbbbcccc, 0xddddeeee, 0xffff1111,
|
||||
0x00010002, 0x00030004, 0x00050006, 0x00070008,
|
||||
0x0009000a, 0x000b000c, 0x000d000e, 0x000f0001
|
||||
};
|
||||
|
||||
printf(" writing to autoinc...\n");
|
||||
hpi_write_inc(TINY_AUTOINC_BASE_ADDR, dummy_data, TINY_AUTOINC_DATA_SIZE);
|
||||
|
||||
printf(" reading from autoinc...\n");
|
||||
hpi_read_inc(TINY_AUTOINC_BASE_ADDR, read_data, TINY_AUTOINC_DATA_SIZE);
|
||||
|
||||
printf(" reading from noinc for comparison...\n");
|
||||
for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++)
|
||||
read_data_noinc[i] = hpi_read_noinc(TINY_AUTOINC_BASE_ADDR+i*4);
|
||||
|
||||
for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) {
|
||||
printf(" written=0x%x, read(inc)=0x%x, read(noinc)=0x%x\n",
|
||||
dummy_data[i], read_data[i], read_data_noinc[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPC1920_HPI_TEST */
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
/*
|
||||
* (C) Copyright 2006
|
||||
* Markus Klotzbuecher, DENX Software Engineering, mk@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
int hpi_init(void);
|
||||
|
||||
#ifdef CONFIG_SPC1920_HPI_TEST
|
||||
int hpi_test(void);
|
||||
#endif
|
||||
|
|
@ -27,9 +27,9 @@
|
|||
#include <common.h>
|
||||
#include <mpc8xx.h>
|
||||
#include "pld.h"
|
||||
#include "hpi.h"
|
||||
|
||||
#define _NOT_USED_ 0xFFFFFFFF
|
||||
/* #define debug(fmt,args...) printf (fmt ,##args) */
|
||||
|
||||
static long int dram_size (long int, long int *, long int);
|
||||
|
||||
|
|
@ -172,6 +172,8 @@ long int initdram (int board_type)
|
|||
memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V;
|
||||
udelay (1000);
|
||||
|
||||
/* initalize the DSP Host Port Interface */
|
||||
hpi_init();
|
||||
|
||||
/* PLD Setup */
|
||||
memctl->memc_or5 = CFG_OR5_PRELIM;
|
||||
|
|
@ -228,6 +230,14 @@ int board_early_init_f(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int last_stage_init(void)
|
||||
{
|
||||
#ifdef CONFIG_SPC1920_HPI_TEST
|
||||
printf("CMB1920 Host Port Interface Test: %s\n",
|
||||
hpi_test() ? "Failed!" : "OK");
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
int checkboard (void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -330,6 +330,40 @@
|
|||
MBMR_TLFB_4X) /* 0x04804114 */ /* 0x10802114 */
|
||||
|
||||
|
||||
/*
|
||||
* DSP Host Port Interface CS3
|
||||
*/
|
||||
#define CFG_SPC1920_HPI_BASE 0x90000000
|
||||
#define CFG_PRELIM_OR3_AM 0xF0000000
|
||||
|
||||
#define CFG_OR3_PRELIM (CFG_PRELIM_OR3_AM | \
|
||||
OR_G5LS | \
|
||||
OR_SCY_0_CLK | \
|
||||
OR_BI)
|
||||
|
||||
#define CFG_BR3_PRELIM ((CFG_SPC1920_HPI_BASE & BR_BA_MSK) | \
|
||||
BR_MS_UPMA | \
|
||||
BR_PS_16 | \
|
||||
BR_V);
|
||||
|
||||
#define CFG_MAMR (MAMR_GPL_A4DIS | \
|
||||
MAMR_RLFA_5X | \
|
||||
MAMR_WLFA_5X)
|
||||
|
||||
#define CONFIG_SPC1920_HPI_TEST
|
||||
|
||||
#ifdef CONFIG_SPC1920_HPI_TEST
|
||||
#define HPI_REG(x) (*((volatile u16 *) (CFG_SPC1920_HPI_BASE + x)))
|
||||
#define HPI_HPIC_1 HPI_REG(0)
|
||||
#define HPI_HPIC_2 HPI_REG(2)
|
||||
#define HPI_HPIA_1 HPI_REG(0x2000000)
|
||||
#define HPI_HPIA_2 HPI_REG(0x2000000 + 2)
|
||||
#define HPI_HPID_INC_1 HPI_REG(0x1000000)
|
||||
#define HPI_HPID_INC_2 HPI_REG(0x1000000 + 2)
|
||||
#define HPI_HPID_NOINC_1 HPI_REG(0x3000000)
|
||||
#define HPI_HPID_NOINC_2 HPI_REG(0x3000000 + 2)
|
||||
#endif /* CONFIG_SPC1920_HPI_TEST */
|
||||
|
||||
/* PLD CS5 */
|
||||
#define CFG_SPC1920_PLD_BASE 0x80000000
|
||||
#define CFG_PRELIM_OR5_AM 0xffff8000
|
||||
|
|
|
|||
Loading…
Reference in New Issue