sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headers
Which pll-s are available depends on the machine type, move the clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files so that we only declare what is actually available. e.g. clock_get_pll5p() is not available on sun6i / sun8i, and with sun9i we get a completely different set of plls. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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@ -24,10 +24,6 @@
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#ifndef __ASSEMBLY__
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int clock_init(void);
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int clock_twi_onoff(int port, int state);
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void clock_set_pll1(unsigned int hz);
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void clock_set_pll3(unsigned int hz);
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unsigned int clock_get_pll5p(void);
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unsigned int clock_get_pll6(void);
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void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz);
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void clock_init_safe(void);
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void clock_init_uart(void);
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@ -320,4 +320,11 @@ struct sunxi_ccm_reg {
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#define CCM_DE_CTRL_RST (1 << 30)
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#define CCM_DE_CTRL_GATE (1 << 31)
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#ifndef __ASSEMBLY__
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void clock_set_pll1(unsigned int hz);
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void clock_set_pll3(unsigned int hz);
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unsigned int clock_get_pll5p(void);
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unsigned int clock_get_pll6(void);
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#endif
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#endif /* _SUNXI_CLOCK_SUN4I_H */
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@ -320,6 +320,11 @@ struct sunxi_ccm_reg {
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#define CCM_DE_CTRL_PLL10 (5 << 24)
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#define CCM_DE_CTRL_GATE (1 << 31)
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#ifndef __ASSEMBLY__
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void clock_set_pll1(unsigned int hz);
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void clock_set_pll3(unsigned int hz);
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void clock_set_pll5(unsigned int clk, bool sigma_delta_enable);
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unsigned int clock_get_pll6(void);
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#endif
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#endif /* _SUNXI_CLOCK_SUN6I_H */
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