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mips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro define 

Add AR933X_PLL_SWITCH_CLOCK_CONTROL_REG define for ar933x chip.

Signed-off-by: Wills Wang <wills.wang@live.com>
This commit is contained in:
Wills Wang 2016-05-30 22:54:54 +08:00 committed by Daniel Schwierzeck
parent cdeb68e292
commit ca09e66b04
2 changed files with 2 additions and 1 deletions
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1
arch/mips/mach-ath79/include/mach/ar71xx_regs.h
View File

@ -331,6 +331,7 @@
#define AR933X_PLL_CPU_CONFIG_REG 0x00
#define AR933X_PLL_CLK_CTRL_REG 0x08
#define AR933X_PLL_DITHER_FRAC_REG 0x10
#define AR933X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24
#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT 10
#define AR933X_PLL_CPU_CONFIG_NINT_MASK 0x3f

2
arch/mips/mach-ath79/reset.c
View File

@ -89,7 +89,7 @@ static int eth_init_ar933x(void)
mdelay(10);
/* Get Atheros S26 PHY out of reset. */
clrsetbits_be32(pregs + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG,
clrsetbits_be32(pregs + AR933X_PLL_SWITCH_CLOCK_CONTROL_REG,
0x1f, 0x10);
mdelay(10);