net: pch_gbe: Convert to use DM PCI API
Use native DM PCI APIs instead of legacy compatible ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -117,15 +117,15 @@ static void pch_gbe_rx_descs_init(struct udevice *dev)
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memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM);
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for (i = 0; i < PCH_GBE_DESC_NUM; i++)
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rx_desc->buffer_addr = pci_phys_to_mem(priv->bdf,
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rx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev,
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(u32)(priv->rx_buff[i]));
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writel(pci_phys_to_mem(priv->bdf, (u32)rx_desc),
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writel(dm_pci_phys_to_mem(priv->dev, (u32)rx_desc),
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&mac_regs->rx_dsc_base);
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writel(sizeof(struct pch_gbe_rx_desc) * (PCH_GBE_DESC_NUM - 1),
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&mac_regs->rx_dsc_size);
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writel(pci_phys_to_mem(priv->bdf, (u32)(rx_desc + 1)),
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writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_desc + 1)),
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&mac_regs->rx_dsc_sw_p);
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}
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@ -137,11 +137,11 @@ static void pch_gbe_tx_descs_init(struct udevice *dev)
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memset(tx_desc, 0, sizeof(struct pch_gbe_tx_desc) * PCH_GBE_DESC_NUM);
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writel(pci_phys_to_mem(priv->bdf, (u32)tx_desc),
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writel(dm_pci_phys_to_mem(priv->dev, (u32)tx_desc),
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&mac_regs->tx_dsc_base);
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writel(sizeof(struct pch_gbe_tx_desc) * (PCH_GBE_DESC_NUM - 1),
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&mac_regs->tx_dsc_size);
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writel(pci_phys_to_mem(priv->bdf, (u32)(tx_desc + 1)),
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writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_desc + 1)),
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&mac_regs->tx_dsc_sw_p);
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}
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@ -251,7 +251,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length)
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if (length < 64)
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frame_ctrl |= PCH_GBE_TXD_CTRL_APAD;
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tx_desc->buffer_addr = pci_phys_to_mem(priv->bdf, (u32)packet);
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tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (u32)packet);
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tx_desc->length = length;
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tx_desc->tx_words_eob = length + 3;
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tx_desc->tx_frame_ctrl = frame_ctrl;
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@ -262,7 +262,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length)
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if (++priv->tx_idx >= PCH_GBE_DESC_NUM)
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priv->tx_idx = 0;
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writel(pci_phys_to_mem(priv->bdf, (u32)(tx_head + priv->tx_idx)),
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writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_head + priv->tx_idx)),
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&mac_regs->tx_dsc_sw_p);
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start = get_timer(0);
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@ -294,7 +294,7 @@ static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp)
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if ((u32)rx_desc == hw_desc)
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return -EAGAIN;
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buffer_addr = pci_mem_to_phys(priv->bdf, rx_desc->buffer_addr);
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buffer_addr = dm_pci_mem_to_phys(priv->dev, rx_desc->buffer_addr);
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*packetp = (uchar *)buffer_addr;
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length = rx_desc->rx_words_eob - 3 - ETH_FCS_LEN;
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@ -315,7 +315,7 @@ static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length)
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if (++rx_swp >= PCH_GBE_DESC_NUM)
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rx_swp = 0;
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writel(pci_phys_to_mem(priv->bdf, (u32)(rx_head + rx_swp)),
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writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_head + rx_swp)),
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&mac_regs->rx_dsc_sw_p);
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return 0;
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@ -421,11 +421,8 @@ int pch_gbe_probe(struct udevice *dev)
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{
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struct pch_gbe_priv *priv;
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struct eth_pdata *plat = dev_get_platdata(dev);
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pci_dev_t devno;
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u32 iobase;
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devno = dm_pci_get_bdf(dev);
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/*
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* The priv structure contains the descriptors and frame buffers which
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* need a strict buswidth alignment (64 bytes). This is guaranteed by
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@ -433,11 +430,11 @@ int pch_gbe_probe(struct udevice *dev)
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*/
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priv = dev_get_priv(dev);
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priv->bdf = devno;
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priv->dev = dev;
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pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
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dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase);
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iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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iobase = pci_mem_to_phys(devno, iobase);
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iobase = dm_pci_mem_to_phys(dev, iobase);
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plat->iobase = iobase;
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priv->mac_regs = (struct pch_gbe_regs *)iobase;
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@ -290,7 +290,7 @@ struct pch_gbe_priv {
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struct phy_device *phydev;
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struct mii_dev *bus;
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struct pch_gbe_regs *mac_regs;
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pci_dev_t bdf;
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struct udevice *dev;
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int rx_idx;
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int tx_idx;
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};
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