Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'

This commit is contained in:
Albert ARIBAUD 2013-11-05 20:50:39 +01:00
commit c0e5dd88c4
28 changed files with 97 additions and 12 deletions

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@ -233,6 +233,8 @@ typedef struct at91_pmc {
#endif
#define AT91_PMC_USBS_USB_PLLA (0x0) /* USB Clock Input is PLLA */
#define AT91_PMC_USBS_USB_UPLL (0x1) /* USB Clock Input is UPLL */
#define AT91_PMC_USBS_USB_PLLB (0x1) /* USB Clock Input is PLLB, AT91SAM9N12 only */
#define AT91_PMC_USB_DIV_2 (0x1 << 8) /* USB Clock divided by 2 */
#define AT91_PMC_USBDIV_8 (0x7 << 8) /* USB Clock divided by 8 */
#define AT91_PMC_USBDIV_10 (0x9 << 8) /* USB Clock divided by 10 */

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@ -38,4 +38,11 @@ typedef struct at91_rstc {
#define AT91_RSTC_SR_NRSTL 0x00010000
#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
#define AT91_RSTC_RSTTYP_USER (4 << 8)
#endif

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@ -199,6 +199,13 @@ void at91sam9n12ek_ks8851_hw_init(void)
}
#endif
#ifdef CONFIG_USB_ATMEL
void at91sam9n12ek_usb_hw_init(void)
{
at91_set_pio_output(AT91_PIO_PORTB, 7, 0);
}
#endif
int board_early_init_f(void)
{
/* Enable clocks for all PIOs */
@ -230,6 +237,10 @@ int board_init(void)
at91sam9n12ek_ks8851_hw_init();
#endif
#ifdef CONFIG_USB_ATMEL
at91sam9n12ek_usb_hw_init();
#endif
return 0;
}

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@ -621,6 +621,24 @@ static u32 gem_mdc_clk_div(int id, struct macb_device *macb)
return config;
}
/*
* Get the DMA bus width field of the network configuration register that we
* should program. We find the width from decoding the design configuration
* register to find the maximum supported data bus width.
*/
static u32 macb_dbw(struct macb_device *macb)
{
switch (GEM_BFEXT(DBWDEF, gem_readl(macb, DCFG1))) {
case 4:
return GEM_BF(DBW, GEM_DBW128);
case 2:
return GEM_BF(DBW, GEM_DBW64);
case 1:
default:
return GEM_BF(DBW, GEM_DBW32);
}
}
int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
{
struct macb_device *macb;
@ -665,7 +683,7 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
*/
if (macb_is_gem(macb)) {
ncfgr = gem_mdc_clk_div(id, macb);
ncfgr |= GEM_BF(DBW, 1);
ncfgr |= macb_dbw(macb);
} else {
ncfgr = macb_mdc_clk_div(id, macb);
}

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@ -58,6 +58,9 @@
#define MACB_WOL 0x00c4
#define MACB_MID 0x00fc
/* GEM specific register offsets */
#define GEM_DCFG1 0x0280
/* Bitfields in NCR */
#define MACB_LB_OFFSET 0
#define MACB_LB_SIZE 1
@ -242,6 +245,14 @@
#define MACB_IDNUM_SIZE 16
/* Bitfields in DCFG1 */
#define GEM_DBWDEF_OFFSET 25
#define GEM_DBWDEF_SIZE 3
/* constants for data bus width */
#define GEM_DBW32 0
#define GEM_DBW64 1
#define GEM_DBW128 2
/* Constants for CLK */
#define MACB_CLK_DIV8 0
#define MACB_CLK_DIV16 1

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@ -18,15 +18,15 @@ int usb_cpu_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
defined(CONFIG_AT91SAM9261)
#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
/* Enable PLLB */
writel(get_pllb_init(), &pmc->pllbr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3)
#ifdef CONFIG_AT91SAM9N12
writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb);
#endif
#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
/* Enable UPLL */
writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
&pmc->uckr);
@ -70,14 +70,15 @@ int usb_cpu_stop(void)
writel(ATMEL_PMC_UHP, &pmc->scdr);
#endif
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
#ifdef CONFIG_AT91SAM9N12
writel(0, &pmc->usb);
#endif
/* Disable PLLB */
writel(0, &pmc->pllbr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
;
#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3)
#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
/* Disable UPLL */
writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)

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@ -112,6 +112,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -154,6 +154,7 @@
* USB Config
*/
#define CONFIG_USB_ATMEL 1
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_KEYBOARD 1
#define CONFIG_USB_STORAGE 1

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@ -185,6 +185,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */

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@ -146,6 +146,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -279,6 +279,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1

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@ -83,6 +83,7 @@
#define CONFIG_CMD_SF
#define CONFIG_CMD_MMC
#define CONFIG_CMD_FAT
#define CONFIG_CMD_USB
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
@ -163,6 +164,18 @@
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END 0x26e00000
/* USB host */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#define CONFIG_USB_STORAGE
#endif
#ifdef CONFIG_SYS_USE_SPIFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */

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@ -159,13 +159,14 @@
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#else
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#endif
#define CONFIG_USB_ATMEL
#define CONFIG_USB_STORAGE
#endif

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@ -346,6 +346,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -160,6 +160,7 @@
#if defined(CONFIG_CMD_USB)
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION

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@ -36,7 +36,7 @@
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_TEXT_BASE 0x21f00000
#define CONFIG_SYS_TEXT_BASE 0x21800000
#endif
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
#define CONFIG_STANDALONE_LOAD_ADDR 0x21000000
@ -133,6 +133,7 @@
#define CONFIG_CMD_UBI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_UBIFS
#define CONFIG_SYS_LONGHELP
/*
@ -162,6 +163,7 @@
* Hardware drivers
*/
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_AT91C_PQFP_UHPBUG
#define CONFIG_USB_STORAGE

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@ -178,6 +178,7 @@
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000

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@ -157,6 +157,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -207,6 +207,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -245,6 +245,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1

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@ -272,6 +272,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1

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@ -120,6 +120,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1

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@ -153,6 +153,7 @@
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI

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@ -119,6 +119,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -65,6 +65,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -165,6 +165,7 @@
/* USB configuration */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION

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@ -174,6 +174,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT

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@ -116,6 +116,7 @@
/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT