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board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL 

Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
This commit is contained in:
Wenyou Yang 2016-04-11 16:41:33 +08:00 committed by Andreas Bießmann
parent 7a91e1a383
commit c043d8d8ce
1 changed files with 2 additions and 2 deletions
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4
board/atmel/sama5d2_xplained/sama5d2_xplained.c
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@ -175,7 +175,7 @@ static void board_sdhci0_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_SDMMC0);
at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0,
GCK_CSS_PLLA_CLK, 1);
GCK_CSS_UPLL_CLK, 1);
}
static void board_sdhci1_hw_init(void)
@ -191,7 +191,7 @@ static void board_sdhci1_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_SDMMC1);
at91_enable_periph_generated_clk(ATMEL_ID_SDMMC1,
GCK_CSS_PLLA_CLK, 1);
GCK_CSS_UPLL_CLK, 1);
}
int board_mmc_init(bd_t *bis)