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uboot
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Merge http://www.denx.de/git/u-boot

This commit is contained in:
Aubrey Li 2007-03-20 22:58:25 +08:00
parent 654589873d 87e0662762
commit b2777c087b
6 changed files with 61 additions and 77 deletions
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77
board/amcc/ebony/init.S
View File

@ -22,53 +22,7 @@
#include <ppc_asm.tmpl>
#include <config.h>
/* General */
#define TLB_VALID 0x00000200
/* Supported page sizes */
#define SZ_1K 0x00000000
#define SZ_4K 0x00000010
#define SZ_16K 0x00000020
#define SZ_64K 0x00000030
#define SZ_256K 0x00000040
#define SZ_1M 0x00000050
#define SZ_16M 0x00000070
#define SZ_256M 0x00000090
/* Storage attributes */
#define SA_W 0x00000800 /* Write-through */
#define SA_I 0x00000400 /* Caching inhibited */
#define SA_M 0x00000200 /* Memory coherence */
#define SA_G 0x00000100 /* Guarded */
#define SA_E 0x00000080 /* Endian */
/* Access control */
#define AC_X 0x00000024 /* Execute */
#define AC_W 0x00000012 /* Write */
#define AC_R 0x00000009 /* Read */
/* Some handy macros */
#define EPN(e) ((e) & 0xfffffc00)
#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
#define TLB2(a) ( (a)&0x00000fbf )
#define tlbtab_start\
mflr r1 ;\
bl 0f ;
#define tlbtab_end\
.long 0, 0, 0 ; \
0: mflr r0 ; \
mtlr r1 ; \
blr ;
#define tlbentry(epn,sz,rpn,erpn,attr)\
.long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
#include <asm-ppc/mmu.h>
/**************************************************************************
* TLB TABLE
@ -81,16 +35,23 @@
*
*************************************************************************/
.section .bootpg,"ax"
.globl tlbtab
.section .bootpg,"ax"
.globl tlbtab
tlbtab:
tlbtab_start
tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
tlbtab_end
tlbtab_start
tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
/*
* TLB entries for SDRAM are not needed on this platform.
* They are dynamically generated in the SPD DDR(2) detection
* routine.
*/
tlbentry(CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X)
tlbentry(CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X)
tlbentry(CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I)
tlbtab_end

16
board/sc3/Makefile
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@ -23,13 +23,17 @@
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
LIB = $(obj)lib$(BOARD).a
OBJS = $(BOARD).o sc3nand.o
COBJS = $(BOARD).o sc3nand.o
SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
@ -39,9 +43,9 @@ distclean: clean
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude .depend
sinclude $(obj).depend
#########################################################################

11
include/configs/PCI405.h
View File

@ -1,6 +1,9 @@
/*
* (C) Copyright 2007
* Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com
*
* (C) Copyright 2001-2004
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -32,8 +35,6 @@
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_IDENT_STRING " $Name: esd_PCI405_05_07_28 $"
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PCI405 1 /* ...on a PCI405 board */
@ -53,9 +54,9 @@
"mem_linux=14336k\0" \
"optargs=panic=0\0" \
"ramargs=setenv bootargs mem=$mem_linux root=/dev/ram rw\0" \
"addcon=setenv bootargs $bootargs console=ttyS0,$baudrate $optargs\0" \
"addcons=setenv bootargs $bootargs console=ttyS0,$baudrate $optargs\0" \
""
#define CONFIG_BOOTCOMMAND "run ramargs;run addcon;loadpci"
#define CONFIG_BOOTCOMMAND "run ramargs;run addcons;loadpci"
#define CONFIG_PREBOOT /* enable preboot variable */

5
include/configs/ebony.h
View File

@ -133,8 +133,9 @@
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
#define CONFIG_PROG_SDRAM_TLB 1 /* setup SDRAM TLB's dynamically*/
/*-----------------------------------------------------------------------
* I2C

20
include/configs/jupiter.h
View File

@ -116,12 +116,16 @@
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
"flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
"flash_self=run ramargs addip;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_82xx\0" \
"addcons=setenv bootargs ${bootargs} console=${contyp}," \
"${baudrate}\0" \
"contyp=ttyS0\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
"bootm\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
"bootfile=/tftpboot/jupiter/uImage\0" \
""
@ -195,6 +199,10 @@
#define CFG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_OVERWRITE 1
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*
* Memory map
*/
@ -240,6 +248,12 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else

9
include/configs/sc3.h
View File

@ -113,10 +113,13 @@
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
"addcons=setenv bootargs ${bootargs} " \
"console=ttyS0,${baudrate}\0" \
"flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
"flash_nand=run nand_args addip addcon;bootm ${kernel_addr}\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"flash_nand=run nand_args addip addcons;bootm ${kernel_addr}\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
"bootm\0" \
"rootpath=/opt/eldk/ppc_4xx\0" \
"bootfile=/tftpboot/sc3/uImage\0" \
"u-boot=/tftpboot/sc3/u-boot.bin\0" \