Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
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commit
b003bf79e3
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@ -25,14 +25,24 @@
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#define _PPC4xx_EBC_H_
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/*
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* Currently there are two register layout versions for the
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* IBM EBC core used on 4xx PPC's:
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* Currently there are two register layout versions for the IBM EBC core
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* used on 4xx PPC's. The following grouping lists the first layout.
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* Within this group there is a slight variation concerning the bit field
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* position of the EMPL and EMPH fields:
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*/
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#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
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defined(CONFIG_405EP) || \
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defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
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defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
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#define CONFIG_EBC_PPC4xx_IBM_VER1
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#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \
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defined(CONFIG_405EP)
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#define EBC_CFG_EMPH_POS 8
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#define EBC_CFG_EMPL_POS 6
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#else
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#define EBC_CFG_EMPH_POS 6
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#define EBC_CFG_EMPL_POS 8
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#endif
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#endif
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/*
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@ -143,10 +153,12 @@
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#define EBC_CFG_EBTC_MASK PPC_REG_VAL(0, 0x1)
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#define EBC_CFG_EBTC_HI PPC_REG_VAL(0, 0x0)
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#define EBC_CFG_EBTC_DRIVEN PPC_REG_VAL(0, 0x1)
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#define EBC_CFG_EMPH_MASK PPC_REG_VAL(6, 0x3)
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#define EBC_CFG_EMPH_ENCODE(n) PPC_REG_VAL(6, (static_cast(u32, n)) & 0x3)
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#define EBC_CFG_EMPL_MASK PPC_REG_VAL(8, 0x3)
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#define EBC_CFG_EMPL_ENCODE(n) PPC_REG_VAL(8, (static_cast(u32, n)) & 0x3)
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#define EBC_CFG_EMPH_MASK PPC_REG_VAL(EBC_CFG_EMPH_POS, 0x3)
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#define EBC_CFG_EMPH_ENCODE(n) PPC_REG_VAL(EBC_CFG_EMPH_POS, \
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(static_cast(u32, n)) & 0x3)
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#define EBC_CFG_EMPL_MASK PPC_REG_VAL(EBC_CFG_EMPL_POS, 0x3)
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#define EBC_CFG_EMPL_ENCODE(n) PPC_REG_VAL(EBC_CFG_EMPH_POS, \
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(static_cast(u32, n)) & 0x3)
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#define EBC_CFG_CSTC_MASK PPC_REG_VAL(9, 0x1)
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#define EBC_CFG_CSTC_HI PPC_REG_VAL(9, 0x0)
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#define EBC_CFG_CSTC_DRIVEN PPC_REG_VAL(9, 0x1)
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