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rockchip: Move jerry SDRAM settings into its own .dts file 

The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2016-11-13 14:22:12 -07:00
parent 38ffcb679b
commit aede3acc9c
2 changed files with 11 additions and 8 deletions
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11
arch/arm/dts/rk3288-veyron-jerry.dts
View File

@ -55,6 +55,17 @@
}; };
}; };
&dmc {
rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa
0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
0x5 0x0>;
rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
0xa60 0x40 0x10 0x0>;
rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
};
&gpio_keys { &gpio_keys {
power { power {
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;

8
arch/arm/dts/rk3288-veyron.dtsi
View File

@ -245,14 +245,6 @@
533000 1150000 533000 1150000
666000 1200000 666000 1200000
>; >;
rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa
0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
0x5 0x0>;
rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
0xa60 0x40 0x10 0x0>;
rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
}; };
&efuse { &efuse {