arm: rmobile: Move sh-i2c of the address defined to common header
R-Car SoCs of rmobile have same IP of sh-i2c, and have same address. This moves sh-i2c of the address defined to rcar-base.h as common header of R-Car SoCs, and headers of each SoCs. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -11,6 +11,10 @@
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#include "rcar-base.h"
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/* SH-I2C */
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#define CONFIG_SYS_I2C_SH_BASE2 0xE6520000
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#define CONFIG_SYS_I2C_SH_BASE3 0xE60B0000
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#define R8A7790_CUT_ES2X 2
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#define IS_R8A7790_ES2() \
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(rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X)
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@ -13,6 +13,10 @@
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/*
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* R-Car (R8A7791) I/O Addresses
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*/
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/* SH-I2C */
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define DBSC3_1_QOS_R0_BASE 0xE67A1000
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#define DBSC3_1_QOS_R1_BASE 0xE67A1100
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#define DBSC3_1_QOS_R2_BASE 0xE67A1200
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@ -14,6 +14,10 @@
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/*
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* R8A7793 I/O Addresses
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*/
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/* SH-I2C */
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define DBSC3_1_QOS_R0_BASE 0xE67A1000
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#define DBSC3_1_QOS_R1_BASE 0xE67A1100
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#define DBSC3_1_QOS_R2_BASE 0xE67A1200
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@ -11,4 +11,7 @@
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#include "rcar-base.h"
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/* SH-I2C */
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#endif /* __ASM_ARCH_R8A7794_H */
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@ -29,6 +29,14 @@
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#define SCIF4_BASE 0xE6EE0000
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#define SCIF5_BASE 0xE6EE8000
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/*
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* SH-I2C
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* Ch2 and ch3 are different address. These are defined
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* in the header of each SoCs.
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*/
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
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#define S3C_BASE 0xE6784000
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#define S3C_INT_BASE 0xE6784A00
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#define S3C_MEDIA_BASE 0xE6784B00
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@ -159,11 +159,8 @@
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
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#define CONFIG_SYS_I2C_SH_SPEED1 400000
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define CONFIG_SYS_I2C_SH_SPEED2 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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@ -156,11 +156,8 @@
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
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#define CONFIG_SYS_I2C_SH_SPEED1 400000
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define CONFIG_SYS_I2C_SH_SPEED2 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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@ -165,11 +165,8 @@
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
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#define CONFIG_SYS_I2C_SH_SPEED1 400000
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define CONFIG_SYS_I2C_SH_SPEED2 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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