microblaze: Remove !OF_CONTROL code for timer and interrupt
OF_CONTROL is enabled by default that's why this is dead code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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a359eaa598
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@ -115,8 +115,6 @@ static void intc_init(void)
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int interrupt_init(void)
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int interrupt_init(void)
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{
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{
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int i;
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int i;
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#ifdef CONFIG_OF_CONTROL
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const void *blob = gd->fdt_blob;
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const void *blob = gd->fdt_blob;
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int node = 0;
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int node = 0;
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@ -136,12 +134,7 @@ int interrupt_init(void)
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} else {
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} else {
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return node;
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return node;
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}
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}
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#else
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#if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
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intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR;
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irq_no = CONFIG_SYS_INTC_0_NUM;
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#endif
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#endif
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if (irq_no) {
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if (irq_no) {
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vecs = calloc(1, sizeof(struct irq_action) * irq_no);
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vecs = calloc(1, sizeof(struct irq_action) * irq_no);
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if (vecs == NULL) {
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if (vecs == NULL) {
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@ -31,11 +31,6 @@ void __udelay(unsigned long usec)
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i = get_timer(0);
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i = get_timer(0);
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while ((get_timer(0) - i) < (usec / 1000))
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while ((get_timer(0) - i) < (usec / 1000))
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;
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;
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} else {
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#ifndef CONFIG_OF_CONTROL
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for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
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;
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#endif
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}
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}
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}
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}
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@ -51,8 +46,6 @@ int timer_init (void)
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int irq = -1;
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int irq = -1;
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u32 preload = 0;
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u32 preload = 0;
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u32 ret = 0;
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u32 ret = 0;
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#ifdef CONFIG_OF_CONTROL
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const void *blob = gd->fdt_blob;
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const void *blob = gd->fdt_blob;
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int node = 0;
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int node = 0;
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u32 cell[2];
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u32 cell[2];
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@ -83,13 +76,6 @@ int timer_init (void)
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return node;
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return node;
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}
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}
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#else
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#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
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preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
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irq = CONFIG_SYS_TIMER_0_IRQ;
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tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
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#endif
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#endif
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if (tmr && preload && irq >= 0) {
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if (tmr && preload && irq >= 0) {
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tmr->loadreg = preload;
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tmr->loadreg = preload;
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tmr->control = TIMER_INTERRUPT | TIMER_RESET;
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tmr->control = TIMER_INTERRUPT | TIMER_RESET;
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@ -13,21 +13,10 @@
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#define XILINX_BOARD_NAME microblaze-generic
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#define XILINX_BOARD_NAME microblaze-generic
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/* System Clock Frequency */
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#define XILINX_CLOCK_FREQ 100000000
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/* Microblaze is microblaze_0 */
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/* Microblaze is microblaze_0 */
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#define XILINX_USE_MSR_INSTR 1
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#define XILINX_USE_MSR_INSTR 1
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#define XILINX_FSL_NUMBER 3
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#define XILINX_FSL_NUMBER 3
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/* Interrupt controller is opb_intc_0 */
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#define XILINX_INTC_BASEADDR 0x41200000
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#define XILINX_INTC_NUM_INTR_INPUTS 6
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/* Timer pheriphery is opb_timer_1 */
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#define XILINX_TIMER_BASEADDR 0x41c00000
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#define XILINX_TIMER_IRQ 0
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/* GPIO is LEDs_4Bit*/
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/* GPIO is LEDs_4Bit*/
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#define XILINX_GPIO_BASEADDR 0x40000000
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#define XILINX_GPIO_BASEADDR 0x40000000
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@ -47,18 +47,6 @@
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#endif
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#endif
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_BOARD_LATE_INIT
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/* interrupt controller */
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#ifdef XILINX_INTC_BASEADDR
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# define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
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# define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
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#endif
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/* timer */
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#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
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# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
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# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
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#endif
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/* watchdog */
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/* watchdog */
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#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
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#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
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# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
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# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
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