board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
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#
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# Copyright 2013 Broadcom Corporation.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += $(BOARD).o
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/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <mmc.h>
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#include <asm/kona-common/kona_sdhci.h>
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#include <asm/kona-common/clk.h>
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#include <asm/arch/sysmap.h>
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#define SECWATCHDOG_SDOGCR_OFFSET 0x00000000
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#define SECWATCHDOG_SDOGCR_EN_SHIFT 27
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#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT 26
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#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
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#define SECWATCHDOG_SDOGCR_LD_SHIFT 0
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* board_init - early hardware init
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*/
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int board_init(void)
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{
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printf("Relocation Offset is: %08lx\n", gd->reloc_off);
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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clk_init();
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return 0;
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}
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/*
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* misc_init_r - miscellaneous platform dependent initializations
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*/
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int misc_init_r(void)
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{
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/* Disable watchdog reset - watchdog unused */
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writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
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(0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
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(4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
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(0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
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(SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
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return 0;
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}
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/*
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* dram_init - sets uboots idea of sdram size
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*/
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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/* This is called after dram_init() so use get_ram_size result */
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = gd->ram_size;
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}
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#ifdef CONFIG_KONA_SDHCI
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/*
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* mmc_init - Initializes mmc
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*/
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int board_mmc_init(bd_t *bis)
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{
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int ret = 0;
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/* Register eMMC - SDIO2 */
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ret = kona_sdhci_init(1, 400000, 0);
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if (ret)
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return ret;
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/* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
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ret = kona_sdhci_init(3, 400000, 0);
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return ret;
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}
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#endif
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@ -273,6 +273,7 @@ Active arm armv7 am33xx ti ti816x
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH Bo Shen <voice.shen@atmel.com>
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Active arm armv7 at91 atmel sama5d3xek sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH Bo Shen <voice.shen@atmel.com>
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Active arm armv7 bcm281xx broadcom bcm28155_ap bcm28155_ap bcm28155_ap Tim Kryger <tim.kryger@linaro.org>
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Active arm armv7 exynos samsung arndale arndale - Inderpal Singh <inderpal.singh@linaro.org>
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Active arm armv7 exynos samsung arndale arndale - Inderpal Singh <inderpal.singh@linaro.org>
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Active arm armv7 exynos samsung origen origen - Chander Kashyap <k.chander@samsung.com>
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Active arm armv7 exynos samsung origen origen - Chander Kashyap <k.chander@samsung.com>
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Active arm armv7 exynos samsung smdk5250 smdk5250 - Chander Kashyap <k.chander@samsung.com>
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Active arm armv7 exynos samsung smdk5250 smdk5250 - Chander Kashyap <k.chander@samsung.com>
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/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __BCM28155_AP_H
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#define __BCM28155_AP_H
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#include <asm/sizes.h>
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#include <asm/arch/sysmap.h>
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/* Architecture, CPU, chip, mach, etc */
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#define CONFIG_ARMV7
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#define CONFIG_KONA
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/*
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* Memory configuration
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*/
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#define CONFIG_SYS_TEXT_BASE 0xae000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_SIZE 0x80000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */
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#define CONFIG_STACKSIZE SZ_256K
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/* GPIO Driver */
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#define CONFIG_KONA_GPIO
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/* MMC/SD Driver */
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#define CONFIG_SDHCI
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#define CONFIG_MMC_SDMA
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#define CONFIG_KONA_SDHCI
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR
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#define CONFIG_SYS_SDIO0_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO1_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO2_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO3_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO0 "sdio1"
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#define CONFIG_SYS_SDIO1 "sdio2"
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#define CONFIG_SYS_SDIO2 "sdio3"
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#define CONFIG_SYS_SDIO3 "sdio4"
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/* I2C Driver */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_KONA
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#define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */
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#define CONFIG_SYS_MAX_I2C_BUS 4
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#define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR
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/* Timer Driver */
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#define CONFIG_SYS_TIMER_RATE 32000
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#define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */
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/* Init functions */
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#define CONFIG_MISC_INIT_R /* board's misc_init_r function */
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/* Some commands use this as the default load address */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
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/* No mtest functions as recommended */
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#undef CONFIG_CMD_MEMORY
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/*
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* This is the initial SP which is used only briefly for relocating the u-boot
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* image to the top of SDRAM. After relocation u-boot moves the stack to the
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* proper place.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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/* Serial Info */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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/* Post pad 3 bytes after each reg addr */
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 13000000
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 0x3e000000
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_ENV_SIZE 0x10000
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */
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/* console configuration */
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#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* One partition type must be defined for part.c
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* This is necessary for the fatls command to work on an SD card
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* for example.
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*/
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#define CONFIG_DOS_PARTITION
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/* version string, parser, etc */
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/* Initial upstream - boot to cmd prompt only */
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#define CONFIG_BOOTCOMMAND ""
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/* Commands */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_FAT_WRITE
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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#endif /* __BCM28155_AP_H */
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