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Blackfin: use on-chip reset func with newer parts 

Turns out the documentation is wrong and doing "RAISE 1" does not result
in a software reset, only a core reset.  So when the on-chip rom has a
functioning reset helper, use it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-04-30 04:35:21 -04:00
parent 867f54cc35
commit 9aeab10bd4
1 changed files with 34 additions and 36 deletions
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70
arch/blackfin/cpu/reset.c
View File

@ -9,6 +9,7 @@
#include <common.h> #include <common.h>
#include <command.h> #include <command.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/mach-common/bits/bootrom.h>
#include "cpu.h" #include "cpu.h"
/* A system soft reset makes external memory unusable so force /* A system soft reset makes external memory unusable so force
@ -29,46 +30,40 @@ static void bfin_reset(void)
*/ */
__builtin_bfin_ssync(); __builtin_bfin_ssync();
/* The bootrom checks to see how it was reset and will /* Initiate System software reset. */
* automatically perform a software reset for us when bfin_write_SWRST(0x7);
* it starts executing after the core reset.
/* Due to the way reset is handled in the hardware, we need
* to delay for 10 SCLKS. The only reliable way to do this is
* to calculate the CCLK/SCLK ratio and multiply 10. For now,
* we'll assume worse case which is a 1:15 ratio.
*/ */
if (ANOMALY_05000353 || ANOMALY_05000386) { asm(
/* Initiate System software reset. */ "LSETUP (1f, 1f) LC0 = %0\n"
bfin_write_SWRST(0x7); "1: nop;"
:
: "a" (15 * 10)
: "LC0", "LB0", "LT0"
);
/* Due to the way reset is handled in the hardware, we need /* Clear System software reset */
* to delay for 10 SCLKS. The only reliable way to do this is bfin_write_SWRST(0);
* to calculate the CCLK/SCLK ratio and multiply 10. For now,
* we'll assume worse case which is a 1:15 ratio.
*/
asm(
"LSETUP (1f, 1f) LC0 = %0\n"
"1: nop;"
:
: "a" (15 * 10)
: "LC0", "LB0", "LT0"
);
/* Clear System software reset */ /* The BF526 ROM will crash during reset */
bfin_write_SWRST(0);
/* The BF526 ROM will crash during reset */
#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__) #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
bfin_read_SWRST(); bfin_read_SWRST();
#endif #endif
/* Wait for the SWRST write to complete. Cannot rely on SSYNC /* Wait for the SWRST write to complete. Cannot rely on SSYNC
* though as the System state is all reset now. * though as the System state is all reset now.
*/ */
asm( asm(
"LSETUP (1f, 1f) LC1 = %0\n" "LSETUP (1f, 1f) LC1 = %0\n"
"1: nop;" "1: nop;"
: :
: "a" (15 * 1) : "a" (15 * 1)
: "LC1", "LB1", "LT1" : "LC1", "LB1", "LT1"
); );
}
while (1) while (1)
/* Issue core reset */ /* Issue core reset */
@ -84,7 +79,10 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{ {
if (board_reset) if (board_reset)
board_reset(); board_reset();
while (1) if (ANOMALY_05000353 || ANOMALY_05000386)
asm("jump (%0);" : : "a" (bfin_reset)); while (1)
asm("jump (%0);" : : "a" (bfin_reset));
else
bfrom_SoftReset((void *)(L1_SRAM_SCRATCH_END - 20));
return 0; return 0;
} }