Merge git://www.denx.de/git/u-boot-marvell
This commit is contained in:
commit
9ae0e14350
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@ -36,6 +36,12 @@ config ARMADA_8K
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bool
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bool
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select ARM64
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select ARM64
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# Armada PLL frequency (used for NAND clock generation)
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config SYS_MVEBU_PLL_CLOCK
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int
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default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K
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default "1000000000" if ARMADA_38X || ARMADA_375
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# Armada XP/38x SoC types...
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# Armada XP/38x SoC types...
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config MV78230
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config MV78230
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bool
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bool
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@ -31,9 +31,6 @@
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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#endif
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#endif
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/* Armada XP PLL frequency (used for NAND clock generation) */
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#define CONFIG_SYS_MVEBU_PLL_CLOCK 2000000000
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/* SOC specific definations */
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/* SOC specific definations */
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#define INTREG_BASE 0xd0000000
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#define INTREG_BASE 0xd0000000
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#define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080)
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#define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080)
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@ -8,6 +8,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc"
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CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc"
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_BOOTDELAY=3
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -68,6 +68,8 @@ struct image_cfg_element {
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IMAGE_CFG_BINARY,
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IMAGE_CFG_BINARY,
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IMAGE_CFG_PAYLOAD,
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IMAGE_CFG_PAYLOAD,
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IMAGE_CFG_DATA,
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IMAGE_CFG_DATA,
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IMAGE_CFG_BAUDRATE,
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IMAGE_CFG_DEBUG,
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} type;
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} type;
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union {
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union {
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unsigned int version;
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unsigned int version;
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@ -85,6 +87,8 @@ struct image_cfg_element {
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unsigned int nandeccmode;
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unsigned int nandeccmode;
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unsigned int nandpagesz;
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unsigned int nandpagesz;
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struct ext_hdr_v0_reg regdata;
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struct ext_hdr_v0_reg regdata;
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unsigned int baudrate;
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unsigned int debug;
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};
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};
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};
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};
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@ -195,6 +199,28 @@ static uint32_t image_checksum32(void *start, uint32_t len)
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return csum;
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return csum;
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}
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}
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static uint8_t baudrate_to_option(unsigned int baudrate)
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{
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switch (baudrate) {
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case 2400:
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return MAIN_HDR_V1_OPT_BAUD_2400;
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case 4800:
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return MAIN_HDR_V1_OPT_BAUD_4800;
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case 9600:
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return MAIN_HDR_V1_OPT_BAUD_9600;
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case 19200:
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return MAIN_HDR_V1_OPT_BAUD_19200;
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case 38400:
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return MAIN_HDR_V1_OPT_BAUD_38400;
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case 57600:
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return MAIN_HDR_V1_OPT_BAUD_57600;
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case 115200:
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return MAIN_HDR_V1_OPT_BAUD_115200;
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default:
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return MAIN_HDR_V1_OPT_BAUD_DEFAULT;
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}
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}
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static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
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static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
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int payloadsz)
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int payloadsz)
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{
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{
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@ -398,6 +424,12 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
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e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION);
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e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION);
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if (e)
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if (e)
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main_hdr->nandbadblklocation = e->nandbadblklocation;
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main_hdr->nandbadblklocation = e->nandbadblklocation;
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e = image_find_option(IMAGE_CFG_BAUDRATE);
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if (e)
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main_hdr->options = baudrate_to_option(e->baudrate);
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e = image_find_option(IMAGE_CFG_DEBUG);
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if (e)
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main_hdr->flags = e->debug ? 0x1 : 0;
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binarye = image_find_option(IMAGE_CFG_BINARY);
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binarye = image_find_option(IMAGE_CFG_BINARY);
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if (binarye) {
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if (binarye) {
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@ -548,6 +580,14 @@ static int image_create_config_parse_oneline(char *line,
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el->type = IMAGE_CFG_DATA;
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el->type = IMAGE_CFG_DATA;
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el->regdata.raddr = strtoul(value1, NULL, 16);
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el->regdata.raddr = strtoul(value1, NULL, 16);
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el->regdata.rdata = strtoul(value2, NULL, 16);
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el->regdata.rdata = strtoul(value2, NULL, 16);
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} else if (!strcmp(keyword, "BAUDRATE")) {
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char *value = strtok_r(NULL, deliminiters, &saveptr);
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el->type = IMAGE_CFG_BAUDRATE;
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el->baudrate = strtoul(value, NULL, 10);
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} else if (!strcmp(keyword, "DEBUG")) {
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char *value = strtok_r(NULL, deliminiters, &saveptr);
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el->type = IMAGE_CFG_DEBUG;
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el->debug = strtoul(value, NULL, 10);
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} else {
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} else {
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fprintf(stderr, "Ignoring unknown line '%s'\n", line);
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fprintf(stderr, "Ignoring unknown line '%s'\n", line);
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}
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}
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@ -73,7 +73,7 @@ struct kwb_header {
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/* Structure of the main header, version 1 (Armada 370, Armada XP) */
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/* Structure of the main header, version 1 (Armada 370, Armada XP) */
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struct main_hdr_v1 {
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struct main_hdr_v1 {
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uint8_t blockid; /* 0 */
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uint8_t blockid; /* 0 */
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uint8_t reserved1; /* 1 */
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uint8_t flags; /* 1 */
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uint16_t reserved2; /* 2-3 */
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uint16_t reserved2; /* 2-3 */
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uint32_t blocksize; /* 4-7 */
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uint32_t blocksize; /* 4-7 */
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uint8_t version; /* 8 */
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uint8_t version; /* 8 */
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@ -82,7 +82,7 @@ struct main_hdr_v1 {
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uint32_t srcaddr; /* C-F */
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uint32_t srcaddr; /* C-F */
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uint32_t destaddr; /* 10-13 */
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uint32_t destaddr; /* 10-13 */
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uint32_t execaddr; /* 14-17 */
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uint32_t execaddr; /* 14-17 */
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uint8_t reserved3; /* 18 */
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uint8_t options; /* 18 */
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uint8_t nandblocksize; /* 19 */
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uint8_t nandblocksize; /* 19 */
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uint8_t nandbadblklocation; /* 1A */
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uint8_t nandbadblklocation; /* 1A */
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uint8_t reserved4; /* 1B */
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uint8_t reserved4; /* 1B */
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@ -91,6 +91,18 @@ struct main_hdr_v1 {
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uint8_t checksum; /* 1F */
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uint8_t checksum; /* 1F */
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};
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};
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/*
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* Main header options
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*/
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#define MAIN_HDR_V1_OPT_BAUD_DEFAULT 0
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#define MAIN_HDR_V1_OPT_BAUD_2400 0x1
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#define MAIN_HDR_V1_OPT_BAUD_4800 0x2
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#define MAIN_HDR_V1_OPT_BAUD_9600 0x3
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#define MAIN_HDR_V1_OPT_BAUD_19200 0x4
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#define MAIN_HDR_V1_OPT_BAUD_38400 0x5
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#define MAIN_HDR_V1_OPT_BAUD_57600 0x6
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#define MAIN_HDR_V1_OPT_BAUD_115200 0x7
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/*
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/*
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* Header for the optional headers, version 1 (Armada 370, Armada XP)
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* Header for the optional headers, version 1 (Armada 370, Armada XP)
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*/
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*/
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