Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver. Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
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@ -82,26 +82,20 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
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static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
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static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
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{
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{
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int dummy;
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u_int32_t val;
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dummy = emif_regs->NANDF1ECC;
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(void)readl(&(emif_regs->NANDFECC[CONFIG_SYS_NAND_CS - 2]));
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/* FIXME: only chipselect 0 is supported for now */
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val = readl(&emif_regs->NANDFCR);
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emif_regs->NANDFCR |= 1 << 8;
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val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
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writel(val, &emif_regs->NANDFCR);
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}
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}
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static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
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static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
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{
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{
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u_int32_t ecc = 0;
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u_int32_t ecc = 0;
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if (region == 1)
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ecc = readl(&(emif_regs->NANDFECC[region - 1]));
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ecc = emif_regs->NANDF1ECC;
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else if (region == 2)
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ecc = emif_regs->NANDF2ECC;
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else if (region == 3)
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ecc = emif_regs->NANDF3ECC;
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else if (region == 4)
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ecc = emif_regs->NANDF4ECC;
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return(ecc);
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return(ecc);
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}
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}
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@ -223,8 +217,11 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
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* Start a new ECC calculation for reading or writing 512 bytes
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* Start a new ECC calculation for reading or writing 512 bytes
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* of data.
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* of data.
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*/
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*/
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val = (emif_regs->NANDFCR & ~(3 << 4)) | (1 << 12);
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val = readl(&emif_regs->NANDFCR);
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emif_regs->NANDFCR = val;
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val &= ~DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK;
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val |= DAVINCI_NANDFCR_4BIT_ECC_SEL(CONFIG_SYS_NAND_CS);
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val |= DAVINCI_NANDFCR_4BIT_ECC_START;
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writel(val, &emif_regs->NANDFCR);
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break;
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break;
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case NAND_ECC_READSYN:
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case NAND_ECC_READSYN:
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val = emif_regs->NAND4BITECC1;
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val = emif_regs->NAND4BITECC1;
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@ -51,10 +51,7 @@ typedef struct {
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dv_reg NANDFCR;
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dv_reg NANDFCR;
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dv_reg NANDFSR;
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dv_reg NANDFSR;
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u_int8_t RSVD1[8];
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u_int8_t RSVD1[8];
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dv_reg NANDF1ECC;
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dv_reg NANDFECC[4];
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dv_reg NANDF2ECC;
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dv_reg NANDF3ECC;
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dv_reg NANDF4ECC;
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u_int8_t RSVD2[60];
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u_int8_t RSVD2[60];
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dv_reg NAND4BITECCLOAD;
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dv_reg NAND4BITECCLOAD;
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dv_reg NAND4BITECC1;
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dv_reg NAND4BITECC1;
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@ -68,4 +65,13 @@ typedef struct {
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} emif_registers;
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} emif_registers;
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typedef emif_registers *emifregs;
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typedef emif_registers *emifregs;
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#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
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#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
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#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
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#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
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#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
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#endif
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#endif
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@ -66,6 +66,7 @@
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/* NAND: socketed, two chipselects, normally 2 GBytes */
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/* NAND: socketed, two chipselects, normally 2 GBytes */
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_PAGE_2K
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@ -65,6 +65,7 @@
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/* NAND */
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/* NAND */
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_HW_ECC
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#define CONFIG_SYS_NAND_HW_ECC
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@ -74,6 +74,7 @@
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/* NAND: socketed, two chipselects, normally 2 GBytes */
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/* NAND: socketed, two chipselects, normally 2 GBytes */
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_PAGE_2K
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@ -75,6 +75,7 @@
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#ifdef CONFIG_SYS_USE_NAND
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#ifdef CONFIG_SYS_USE_NAND
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#undef CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
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#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
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@ -114,6 +114,7 @@
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/*=====================*/
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/*=====================*/
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#ifdef CONFIG_SYS_USE_NAND
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#ifdef CONFIG_SYS_USE_NAND
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#undef CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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@ -83,6 +83,7 @@
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#undef CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
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#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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@ -78,6 +78,7 @@
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#undef CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
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#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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@ -114,6 +114,7 @@
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/*=====================*/
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/*=====================*/
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#ifdef CONFIG_SYS_USE_NAND
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#ifdef CONFIG_SYS_USE_NAND
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_CS 2
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#undef CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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