Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC
All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
9eb79bd885
commit
96e21f86e8
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@ -91,13 +91,6 @@
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#include <miiphy.h>
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#include <malloc.h>
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/*
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* Only compile for platform with AMCC EMAC ethernet controller and
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* network support enabled.
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* Remark: CONFIG_405 describes Xilinx PPC405 FPGA without EMAC controller!
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*/
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#if defined(CONFIG_CMD_NET) && !defined(CONFIG_405) && !defined(CONFIG_IOP480)
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#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
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#error "CONFIG_MII has to be defined!"
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#endif
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@ -2131,5 +2124,3 @@ int emac4xx_miiphy_initialize (bd_t * bis)
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return 0;
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}
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#endif /* !defined(CONFIG_NET_MULTI) */
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#endif
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@ -38,6 +38,7 @@ COBJS += 44x_spd_ddr2.o
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ifdef CONFIG_PPC4xx_DDR_AUTOCALIBRATION
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COBJS += 4xx_ibm_ddr2_autocalib.o
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endif
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COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
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COBJS += 4xx_pci.o
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COBJS += 4xx_pcie.o
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COBJS += bedbug_405.o
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@ -67,6 +67,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -56,6 +56,7 @@
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -52,6 +52,7 @@
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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@ -52,6 +52,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -54,6 +54,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -54,6 +54,7 @@
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#undef CONFIG_LOADS_ECHO /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -53,6 +53,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -50,6 +50,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -39,6 +39,8 @@
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#define CONFIG_SYS_CLK_FREQ 25000000
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#define CONFIG_BAUDRATE 9600
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */
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@ -52,6 +52,7 @@
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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@ -54,6 +54,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -253,6 +253,7 @@
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int du440_phy_addr(int devnum);
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#endif
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_IBM_EMAC4_V4 1
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR du440_phy_addr(0) /* PHY address */
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@ -93,6 +93,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address */
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@ -88,6 +88,7 @@
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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@ -80,6 +80,7 @@
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#define CONFIG_NET_MULTI 1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_PHY1_ADDR 1 /* PHY address */
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@ -64,6 +64,7 @@
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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@ -54,6 +54,7 @@
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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@ -132,6 +132,7 @@
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address */
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@ -157,6 +157,7 @@
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/*-----------------------------------------------------------------------
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* Networking
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*----------------------------------------------------------------------*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_NET_MULTI 1
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#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
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@ -221,6 +221,7 @@
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/*-----------------------------------------------------------------------
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* Networking
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*----------------------------------------------------------------------*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_NET_MULTI 1
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#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
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@ -336,6 +336,7 @@
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/************************************************************
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* Ethernet Stuff
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***********************************************************/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address */
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#define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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/************************************************************
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* Ethernet Stuff
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***********************************************************/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address */
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/************************************************************
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_IBM_EMAC4_V4 1
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */
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#undef CONFIG_EXT_PHY
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#define CONFIG_NET_MULTI 1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#ifndef CONFIG_EXT_PHY
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#define CONFIG_PHY_ADDR 1 /* EMAC0 PHY address */
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_NET_MULTI 1
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#undef CONFIG_HAS_ETH1
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* disallow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* disallow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address phy0 not populated */
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#define CONFIG_PHY1_ADDR 1 /* PHY address phy1 not populated */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_NET_MULTI 1
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#define CONFIG_PHY_ADDR 0x02 /* dummy setting, no EMAC0 used */
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/*
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* Ethernet/EMAC/PHY
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*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII /* MII PHY management */
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#define CONFIG_NET_MULTI
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#define CONFIG_NETCONSOLE /* include NetConsole support */
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* MII PHY configuration
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*
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*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */
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* MII PHY configuration
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*
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*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_IBM_EMAC4_V4 1
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 2 /* PHY address, See schematics */
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_IBM_EMAC4_V4 1
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 3 /* PHY address, See schematics */
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/*
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* Ethernet/EMAC/PHY
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*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address */
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#if defined(CONFIG_440)
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0x1c /* PHY address */
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#define CONFIG_HAS_ETH1
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_NET_MULTI 1 /* required for netconsole */
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#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
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#define CONFIG_ENV_IS_IN_EEPROM
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||||
#undef CONFIG_ENV_IS_IN_FLASH
|
||||
|
||||
#define CONFIG_PPC4xx_EMAC
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#define CONFIG_HAS_ETH1 1
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
|
|
|
@ -58,6 +58,7 @@
|
|||
#define CONFIG_BOOTCOMMAND "version;echo;tftpboot ${loadaddr} ${loadfile};bootvx" /* autoboot command */
|
||||
|
||||
|
||||
#define CONFIG_PPC4xx_EMAC
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
#define CONFIG_PHY_ADDR 0 /* PHY address */
|
||||
#define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */
|
||||
|
|
|
@ -166,6 +166,8 @@
|
|||
/* #define CONFIG_EEPRO100_SROM_WRITE */
|
||||
/* #define CONFIG_SHOW_MAC */
|
||||
#define CONFIG_EEPRO100
|
||||
|
||||
#define CONFIG_PPC4xx_EMAC
|
||||
#define CONFIG_MII 1 /* add 405GP MII PHY management */
|
||||
#define CONFIG_PHY_ADDR 1 /* the connected Phy defaults to address 1 */
|
||||
|
||||
|
|
|
@ -46,6 +46,7 @@
|
|||
|
||||
#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
|
||||
|
||||
#define CONFIG_PPC4xx_EMAC
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
#define CONFIG_PHY_ADDR 0x01 /* PHY address */
|
||||
#define CONFIG_HAS_ETH1 1
|
||||
|
|
|
@ -153,7 +153,7 @@ int eth_initialize(bd_t *bis)
|
|||
#if defined(CONFIG_DB64460) || defined(CONFIG_P3Mx)
|
||||
mv6446x_eth_initialize(bis);
|
||||
#endif
|
||||
#if defined(CONFIG_4xx) && !defined(CONFIG_IOP480) && !defined(CONFIG_AP1000)
|
||||
#if defined(CONFIG_PPC4xx_EMAC)
|
||||
ppc_4xx_eth_initialize(bis);
|
||||
#endif
|
||||
if (!eth_devices) {
|
||||
|
@ -485,8 +485,7 @@ int eth_initialize(bd_t *bis)
|
|||
#if defined(CONFIG_AT91RM9200)
|
||||
at91rm9200_miiphy_initialize(bis);
|
||||
#endif
|
||||
#if defined(CONFIG_4xx) && !defined(CONFIG_IOP480) \
|
||||
&& !defined(CONFIG_AP1000) && !defined(CONFIG_405)
|
||||
#if defined(CONFIG_PPC4xx_EMAC)
|
||||
emac4xx_miiphy_initialize(bis);
|
||||
#endif
|
||||
#if defined(CONFIG_MCF52x2)
|
||||
|
|
Loading…
Reference in New Issue