tqm5200: Correct comment and code in post_hotkeys_pressed.
This fixes the code and the comment according to the original intent of doing an intensive memory test when PSC6_3 is pulled low on the STK52xx. Notably PORT_CONFIG will be overridden with this correct code now, so beware. The original code only worked by coincidence depending on the PORT_CONFIG setting from the header file. The new code was tested to ensure that the (undocumented) memory test still works on the STK52x. Signed-off-by: Detlev Zundel <dzu@denx.de> CC: Martin Krause <Martin.Krause@tqs.de> Minor white-space cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
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@ -358,11 +358,9 @@ int post_hotkeys_pressed(void)
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gpio = (struct mpc5xxx_gpio*) MPC5XXX_GPIO;
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/*
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* Configure PSC6_1 and PSC6_3 as GPIO. PSC6 then couldn't be used in
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* CODEC or UART mode. Consumer IrDA should still be possible.
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* Configure PSC6_0 through PSC6_3 as GPIO.
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*/
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gpio->port_config &= ~(0x07000000);
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gpio->port_config |= 0x03000000;
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gpio->port_config &= ~(0x00700000);
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/* Enable GPIO for GPIO_IRDA_1 (IR_USB_CLK pin) = PSC6_3 */
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gpio->simple_gpioe |= 0x20000000;
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@ -540,6 +540,8 @@
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* 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
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* Extended POST test is not available.
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* Use for STK52xx, FO300 and CAM5200 boards.
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* WARNING: When the extended POST is enabled, these bits will
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* be overridden by this code as GPIOs!
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* use PCI_DIS: Bit 16 (mask 0x00008000):
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* 1 -> disable PCI controller (on CAM5200 board).
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* use USB: Bits 18-19 (mask 0x00003000):
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@ -552,7 +554,7 @@
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* 000 -> All PSC2 pins are GPIOs.
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* 100 -> UART (on CAM5200 board).
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* 001 -> CAN1/2 on PSC2 pins.
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* Use for REV100 STK52xx boards
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* Use for REV100 STK52xx boards
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* 01x -> Use AC97 (on FO300 board).
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* use PSC1: Bits 29-31 (mask: 0x00000007):
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* 100 -> UART (on all boards).
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@ -711,20 +713,20 @@
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#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
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/* Offset for data I/O */
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/* Offset for data I/O */
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#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
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/* Offset for normal register accesses */
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/* Offset for normal register accesses */
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#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
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/* Offset for alternate registers */
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/* Offset for alternate registers */
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#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
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/* Interval between registers */
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/* Interval between registers */
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#define CONFIG_SYS_ATA_STRIDE 4
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/* Support ATAPI devices */
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#define CONFIG_ATAPI 1
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#define CONFIG_ATAPI 1
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/*-----------------------------------------------------------------------
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* Open firmware flat tree support
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