zynqmp works
This commit is contained in:
Michal Simek
parent
64b67fb24b
commit
8a5db0ab9a
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@ -135,6 +135,34 @@ static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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return fdt_getprop(fdt, offset, "reg", lenp);
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}
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int dram_init(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, len;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 0 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return -EINVAL;
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}
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val = get_memory_reg_prop(fdt, &len);
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if (len / sizeof(*val) < ac + sc)
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return -EINVAL;
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val += ac;
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gd->ram_size = fdtdec_get_number(val, sc);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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zynq_ddrc_init();
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return 0;
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}
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void dram_init_banksize(void)
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{
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const void *fdt = gd->fdt_blob;
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@ -168,34 +196,6 @@ void dram_init_banksize(void)
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(unsigned long)gd->bd->bi_dram[i].size);
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}
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}
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int dram_init(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, len;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 0 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return -EINVAL;
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}
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val = get_memory_reg_prop(fdt, &len);
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if (len / sizeof(*val) < ac + sc)
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return -EINVAL;
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val += ac;
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gd->ram_size = fdtdec_get_number(val, sc);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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zynq_ddrc_init();
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return 0;
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}
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#else
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int dram_init(void)
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{
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@ -180,124 +180,76 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
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}
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#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
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/*
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* fdt_get_reg - Fill buffer by information from DT
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*/
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static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
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const u32 *cell, int n)
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static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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{
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int i = 0, b, banks;
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int parent_offset = fdt_parent_offset(fdt, nodeoffset);
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int address_cells = fdt_address_cells(fdt, parent_offset);
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int size_cells = fdt_size_cells(fdt, parent_offset);
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char *p = buf;
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u64 val;
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u64 vals;
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int offset;
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debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
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__func__, address_cells, size_cells, buf, cell);
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offset = fdt_path_offset(fdt, "/memory");
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if (offset < 0)
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return NULL;
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/* Check memory bank setup */
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banks = n % (address_cells + size_cells);
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if (banks)
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panic("Incorrect memory setup cells=%d, ac=%d, sc=%d\n",
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n, address_cells, size_cells);
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banks = n / (address_cells + size_cells);
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for (b = 0; b < banks; b++) {
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debug("%s: Bank #%d:\n", __func__, b);
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if (address_cells == 2) {
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val = cell[i + 1];
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val <<= 32;
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val |= cell[i];
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val = fdt64_to_cpu(val);
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debug("%s: addr64=%llx, ptr=%p, cell=%p\n",
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__func__, val, p, &cell[i]);
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*(phys_addr_t *)p = val;
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} else {
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debug("%s: addr32=%x, ptr=%p\n",
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__func__, fdt32_to_cpu(cell[i]), p);
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*(phys_addr_t *)p = fdt32_to_cpu(cell[i]);
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}
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p += sizeof(phys_addr_t);
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i += address_cells;
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debug("%s: pa=%p, i=%x, size=%zu\n", __func__, p, i,
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sizeof(phys_addr_t));
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if (size_cells == 2) {
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vals = cell[i + 1];
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vals <<= 32;
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vals |= cell[i];
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vals = fdt64_to_cpu(vals);
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debug("%s: size64=%llx, ptr=%p, cell=%p\n",
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__func__, vals, p, &cell[i]);
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*(phys_size_t *)p = vals;
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} else {
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debug("%s: size32=%x, ptr=%p\n",
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__func__, fdt32_to_cpu(cell[i]), p);
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*(phys_size_t *)p = fdt32_to_cpu(cell[i]);
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}
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p += sizeof(phys_size_t);
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i += size_cells;
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debug("%s: ps=%p, i=%x, size=%zu\n",
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__func__, p, i, sizeof(phys_size_t));
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}
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/* Return the first address size */
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return *(phys_size_t *)((char *)buf + sizeof(phys_addr_t));
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}
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#define FDT_REG_SIZE sizeof(u32)
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/* Temp location for sharing data for storing */
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/* Up to 64-bit address + 64-bit size */
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static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];
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void dram_init_banksize(void)
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{
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int bank;
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memcpy(&gd->bd->bi_dram[0], &tmp, sizeof(tmp));
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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debug("Bank #%d: start %llx\n", bank,
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(unsigned long long)gd->bd->bi_dram[bank].start);
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debug("Bank #%d: size %llx\n", bank,
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(unsigned long long)gd->bd->bi_dram[bank].size);
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}
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return fdt_getprop(fdt, offset, "reg", lenp);
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}
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int dram_init(void)
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{
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int node, len;
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const void *blob = gd->fdt_blob;
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const u32 *cell;
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, len;
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memset(&tmp, 0, sizeof(tmp));
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/* find or create "/memory" node. */
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node = fdt_subnode_offset(blob, 0, "memory");
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if (node < 0) {
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printf("%s: Can't get memory node\n", __func__);
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return node;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 0 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return -EINVAL;
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}
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/* Get pointer to cells and lenght of it */
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cell = fdt_getprop(blob, node, "reg", &len);
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if (!cell) {
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printf("%s: Can't get reg property\n", __func__);
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return -1;
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}
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val = get_memory_reg_prop(fdt, &len);
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if (len / sizeof(*val) < ac + sc)
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return -EINVAL;
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gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
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val += ac;
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debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
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gd->ram_size = fdtdec_get_number(val, sc);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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return 0;
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}
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void dram_init_banksize(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, cells, len, i;
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val = get_memory_reg_prop(fdt, &len);
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if (len < 0)
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return;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return;
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}
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cells = ac + sc;
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len /= sizeof(*val);
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for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
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i++, len -= cells) {
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gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
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val += ac;
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gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
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val += sc;
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debug("DRAM bank %d: start = %08lx, size = %08lx\n",
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i, (unsigned long)gd->bd->bi_dram[i].start,
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(unsigned long)gd->bd->bi_dram[i].size);
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}
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}
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#else
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int dram_init(void)
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{
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