Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
This commit is contained in:
commit
826d06dbdd
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@ -720,16 +720,39 @@ enable_l2_cluster_l2:
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ori r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l
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sync
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stw r4, 0(r3) /* invalidate L2 */
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/* Poll till the bits are cleared */
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1: sync
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lwz r0, 0(r3)
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twi 0, r0, 0
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isync
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and. r1, r0, r4
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bne 1b
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/* L2PE must be set before L2 cache is enabled */
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lis r4, (L2CSR0_L2PE)@h
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ori r4, r4, (L2CSR0_L2PE)@l
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sync
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stw r4, 0(r3) /* enable L2 parity/ECC error checking */
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/* Poll till the bit is set */
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1: sync
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lwz r0, 0(r3)
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twi 0, r0, 0
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isync
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and. r1, r0, r4
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beq 1b
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lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
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ori r4, r4, (L2CSR0_L2REP_MODE)@l
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sync
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stw r4, 0(r3) /* enable L2 */
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/* Poll till the bit is set */
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1: sync
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lwz r0, 0(r3)
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twi 0, r0, 0
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isync
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and. r1, r0, r4
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beq 1b
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delete_ccsr_l2_tlb:
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delete_tlb0_entry 0, CONFIG_SYS_CCSRBAR + 0xC20000, MAS2_I|MAS2_G, r3
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#endif
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@ -65,6 +65,7 @@ ppcSync:
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* flush_dcache_range(unsigned long start, unsigned long stop)
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*/
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_GLOBAL(flush_dcache_range)
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#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
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li r5,L1_CACHE_BYTES-1
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andc r3,r3,r5
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subf r4,r3,r4
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@ -77,6 +78,7 @@ _GLOBAL(flush_dcache_range)
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addi r3,r3,L1_CACHE_BYTES
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bdnz 1b
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sync /* wait for dcbst's to get to ram */
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#endif
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blr
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/*
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@ -87,6 +89,7 @@ _GLOBAL(flush_dcache_range)
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* invalidate_dcache_range(unsigned long start, unsigned long stop)
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*/
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_GLOBAL(invalidate_dcache_range)
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#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
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li r5,L1_CACHE_BYTES-1
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andc r3,r3,r5
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subf r4,r3,r4
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@ -100,5 +103,6 @@ _GLOBAL(invalidate_dcache_range)
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addi r3,r3,L1_CACHE_BYTES
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bdnz 1b
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sync /* wait for dcbi's to get to ram */
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#endif
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blr
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@ -1,5 +1,5 @@
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T208XQDS BOARD
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#M: -
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M: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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S: Maintained
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F: board/freescale/t208xqds/
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F: include/configs/T208xQDS.h
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@ -1,5 +1,5 @@
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T208XRDB BOARD
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#M: -
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M: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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S: Maintained
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F: board/freescale/t208xrdb/
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F: include/configs/T208xRDB.h
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@ -77,6 +77,9 @@ int board_eth_init(bd_t *bis)
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puts("Invalid SerDes1 protocol for T4240RDB\n");
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}
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fm_disable_port(FM1_DTSEC5);
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fm_disable_port(FM1_DTSEC6);
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for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
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interface = fm_info_get_enet_if(i);
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switch (interface) {
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@ -115,6 +118,8 @@ int board_eth_init(bd_t *bis)
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puts("Invalid SerDes2 protocol for T4240RDB\n");
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}
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fm_disable_port(FM2_DTSEC5);
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fm_disable_port(FM2_DTSEC6);
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for (i = FM2_DTSEC1; i < FM2_DTSEC1 + CONFIG_SYS_NUM_FM2_DTSEC; i++) {
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interface = fm_info_get_enet_if(i);
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switch (interface) {
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@ -74,7 +74,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
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if ((port == FM1_DTSEC9 || port == FM1_DTSEC10) &&
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((is_serdes_configured(XFI_FM1_MAC9)) ||
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(is_serdes_configured(XFI_FM1_MAC10))))
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return PHY_INTERFACE_MODE_XGMII;
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return PHY_INTERFACE_MODE_NONE;
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if ((port == FM2_10GEC1 || port == FM2_10GEC2) &&
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((is_serdes_configured(XAUI_FM2_MAC9)) ||
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@ -291,6 +291,10 @@ unsigned long get_board_ddr_clk(void);
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#define QIXIS_LBMAP_SHIFT 0
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#define QIXIS_LBMAP_DFLTBANK 0x00
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#define QIXIS_LBMAP_ALTBANK 0x04
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#define QIXIS_LBMAP_NAND 0x09
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#define QIXIS_LBMAP_SD 0x00
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#define QIXIS_RCW_SRC_NAND 0x104
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#define QIXIS_RCW_SRC_SD 0x040
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#define QIXIS_RST_CTL_RESET 0x83
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#define QIXIS_RST_FORCE_MEM 0x1
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#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
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