EXYNOS: SMDK5250: Support all 4 UARTs
This properly configures the mux to enable all UARTs. This also fixes things so that we don't configure balls XUCTSN_1 and XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't connected. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Chander kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -224,11 +224,51 @@ static void board_uart_init(void)
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(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
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int i;
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/* UART1 GPIOs (part1) : GPA0CON[7:4] 0x2222 */
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for (i = 4; i < 8; i++) {
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/*
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* UART0 GPIOs : GPA0CON[3:0] 0x2222
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* Must set CFG17 switches to select UART0 to use.
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*/
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for (i = 0; i <= 3; i++) {
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s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE);
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s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2));
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}
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/*
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* UART1 GPIOs : GPA0CON[5:4] 0x22
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* Must set CFG17 switches to select UART1 to use.
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*
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* This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
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* in order to use them (so that those pins can be used for I2C).
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*/
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for (i = 4; i <= 5; i++) {
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s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE);
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s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2));
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}
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/*
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* UART2 GPIOs : GPA1CON[1:0] 0x22
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* Must set CFG17 switches to select UART2 to use.
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*
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* This only sets RXD/TXD, as RTS/CTS need a resistor soldered down
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* in order to use them (so that those pins can be used for I2C).
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*/
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for (i = 0; i <= 1; i++) {
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s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE);
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s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2));
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}
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/*
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* UART3 GPIOs : GPA1CON[5:4] 0x22
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* Must set CFG16 switches to select UART3 to use.
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*/
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for (i = 4; i <= 5; i++) {
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s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE);
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s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2));
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}
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/*
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* There's no mux for UART4--it's internal only
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*/
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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