mx6q: Add basic support for mx6qsabreauto
mx6qsabreauto is a board based on mx6q SoC with the following features: - 2GB of DDR3 - 2 USB ports - 1 HDMI output port - SPI NOR - 2 LVDS LCD ports - Gigabit Ethernet - Camera - eMMC and SD card slot - Multichannel Audio - CAN - SATA - NAND - PCIE - Video Input Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
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bcfc71186e
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7dd6545da7
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@ -651,6 +651,7 @@ Fabio Estevam <fabio.estevam@freescale.com>
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mx53ard i.MX53
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mx53smd i.MX53
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mx6qsabresd i.MX6Q
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mx6qsabreauto i.MX6Q
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Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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@ -0,0 +1,41 @@
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#
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# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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#
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# (C) Copyright 2011 Freescale Semiconductor, Inc.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := mx6qsabreauto.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,159 @@
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# Copyright (C) 2012 Freescale Semiconductor, Inc.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not write to the Free Software
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# Foundation Inc. 51 Franklin Street Fifth Floor Boston,
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# MA 02110-1301 USA
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#
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# Refer docs/README.imxmage for more details about how-to configure
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# and create imximage boot image
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#
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# The syntax is taken as close as possible with the kwbimage
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# image version
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IMAGE_VERSION 2
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# Boot Device : one of
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# spi, sd (the board has no nand neither onenand)
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BOOT_FROM sd
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# Device Configuration Data (DCD)
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#
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# Each entry must have the format:
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# Addr-type Address Value
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#
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# where:
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# Addr-type register length (1,2 or 4 bytes)
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# Address absolute address of the register
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# value value to be stored in the register
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DATA 4 0x020e05a8 0x00000028
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DATA 4 0x020e05b0 0x00000028
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DATA 4 0x020e0524 0x00000028
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DATA 4 0x020e051c 0x00000028
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DATA 4 0x020e0518 0x00000028
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DATA 4 0x020e050c 0x00000028
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DATA 4 0x020e05b8 0x00000028
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DATA 4 0x020e05c0 0x00000028
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DATA 4 0x020e05ac 0x00000028
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DATA 4 0x020e05b4 0x00000028
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DATA 4 0x020e0528 0x00000028
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DATA 4 0x020e0520 0x00000028
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DATA 4 0x020e0514 0x00000028
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DATA 4 0x020e0510 0x00000028
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DATA 4 0x020e05bc 0x00000028
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DATA 4 0x020e05c4 0x00000028
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DATA 4 0x020e056c 0x00000030
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DATA 4 0x020e0578 0x00000030
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DATA 4 0x020e0588 0x00000030
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DATA 4 0x020e0594 0x00000030
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DATA 4 0x020e057c 0x00000030
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DATA 4 0x020e0590 0x00000030
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DATA 4 0x020e0598 0x00000030
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DATA 4 0x020e058c 0x00000000
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DATA 4 0x020e059c 0x00003030
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DATA 4 0x020e05a0 0x00003030
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DATA 4 0x020e0784 0x00000028
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DATA 4 0x020e0788 0x00000028
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DATA 4 0x020e0794 0x00000028
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DATA 4 0x020e079c 0x00000028
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DATA 4 0x020e07a0 0x00000028
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DATA 4 0x020e07a4 0x00000028
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DATA 4 0x020e07a8 0x00000028
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DATA 4 0x020e0748 0x00000028
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DATA 4 0x020e074c 0x00000030
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DATA 4 0x020e0750 0x00020000
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DATA 4 0x020e0758 0x00000000
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DATA 4 0x020e0774 0x00020000
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DATA 4 0x020e078c 0x00000030
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DATA 4 0x020e0798 0x000C0000
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DATA 4 0x021b081c 0x33333333
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DATA 4 0x021b0820 0x33333333
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DATA 4 0x021b0824 0x33333333
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DATA 4 0x021b0828 0x33333333
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DATA 4 0x021b481c 0x33333333
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DATA 4 0x021b4820 0x33333333
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DATA 4 0x021b4824 0x33333333
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DATA 4 0x021b4828 0x33333333
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DATA 4 0x021b0018 0x00001740
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DATA 4 0x021b001c 0x00008000
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DATA 4 0x021b000c 0x8A8F7975
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DATA 4 0x021b0010 0xFF538E64
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DATA 4 0x021b0014 0x01FF00DB
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DATA 4 0x021b002c 0x000026D2
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DATA 4 0x021b0030 0x008F0E21
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DATA 4 0x021b0008 0x09444040
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DATA 4 0x021b0004 0x00020036
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DATA 4 0x021b0040 0x00000047
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DATA 4 0x021b0000 0x841A0000
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DATA 4 0x021b001c 0x04088032
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DATA 4 0x021b001c 0x00008033
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DATA 4 0x021b001c 0x00428031
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DATA 4 0x021b001c 0x09408030
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DATA 4 0x021b001c 0x04008040
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DATA 4 0x021b0800 0xA1380003
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DATA 4 0x021b0020 0x00005800
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DATA 4 0x021b0818 0x00000007
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DATA 4 0x021b4818 0x00000007
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# Calibration values based on ARD and 528MHz
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DATA 4 0x021b083c 0x434B0358
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DATA 4 0x021b0840 0x033D033C
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DATA 4 0x021b483c 0x03520362
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DATA 4 0x021b4840 0x03480318
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DATA 4 0x021b0848 0x41383A3C
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DATA 4 0x021b4848 0x3F3C374A
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DATA 4 0x021b0850 0x42434444
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DATA 4 0x021b4850 0x4932473A
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DATA 4 0x021b080c 0x001F001F
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DATA 4 0x021b0810 0x001F001F
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DATA 4 0x021b480c 0x001F001F
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DATA 4 0x021b4810 0x001F001F
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DATA 4 0x021b08b8 0x00000800
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DATA 4 0x021b48b8 0x00000800
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DATA 4 0x021b0404 0x00011006
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DATA 4 0x021b0004 0x00025576
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DATA 4 0x021b001c 0x00000000
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DATA 4 0x020c4068 0x00C03F3F
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DATA 4 0x020c406c 0x0030FC00
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DATA 4 0x020c4070 0x0FFFC000
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DATA 4 0x020c4074 0x3FF00000
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DATA 4 0x020c4078 0x00FFF300
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DATA 4 0x020c407c 0x0F0000C3
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DATA 4 0x020c4080 0x000003FF
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@ -0,0 +1,117 @@
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6x_pins.h>
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#include <asm/errno.h>
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#include <asm/gpio.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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iomux_v3_cfg_t uart4_pads[] = {
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MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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iomux_v3_cfg_t usdhc3_pads[] = {
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MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_GPIO_18__USDHC3_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_NANDF_CS2__GPIO_6_15 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
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}
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg usdhc_cfg[1] = {
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{USDHC3_BASE_ADDR},
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};
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int board_mmc_getcd(struct mmc *mmc)
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{
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gpio_direction_input(IMX_GPIO_NR(6, 15));
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return !gpio_get_value(IMX_GPIO_NR(6, 15));
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}
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int board_mmc_init(bd_t *bis)
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{
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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}
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#endif
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u32 get_board_rev(void)
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{
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return 0x63000;
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}
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: MX6Q-Sabreauto\n");
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return 0;
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}
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@ -237,6 +237,7 @@ mx53smd arm armv7 mx53smd freesca
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ima3-mx53 arm armv7 ima3-mx53 esg mx5 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg
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vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg
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mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg
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mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg
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mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
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mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
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cm_t35 arm armv7 cm_t35 - omap3
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@ -0,0 +1,20 @@
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q SabreSD board.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#ifndef __MX6QSABREAUTO_CONFIG_H
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#define __MX6QSABREAUTO_CONFIG_H
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#include "mx6qsabre_common.h"
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#define CONFIG_MACH_TYPE 3529
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#define CONFIG_MXC_UART_BASE UART4_BASE
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#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
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#endif /* __MX6QSABREAUTO_CONFIG_H */
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