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Blackfin: spi: fix pin handling of SPI0 SSEL4 

CS4 on SPI0 has a dedicated PH8 pin which needs to be enabled as a
peripheral in order to work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2009-05-29 17:01:48 -04:00
parent 2157359dad
commit 7d6900ebe1
1 changed files with 1 additions and 1 deletions
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2
drivers/spi/bfin_spi.c
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@ -156,7 +156,7 @@ static void spi_portmux(struct spi_slave *slave)
case 1: SET_MUX(f, 2, 1); f_fer |= PF7; break;
case 2: /* see G above */ g_fer |= PG15; break;
case 3: SET_MUX(h, 1, 3); f_fer |= PH4; break;
case 4: /* no muxing */ break;
case 4: /* no muxing */ h_fer |= PH8; break;
case 5: SET_MUX(g, 1, 3); h_fer |= PG3; break;
case 6: /* no muxing */ break;
case 7: /* no muxing */ break;