powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot
By default, PAMU's (IOMMU) are enabled in case of secure boot. Disable/bypass them once the control reaches the bootloader. For non-secure boot, PAMU's are already bypassed in the default SoC configuration. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@ -426,7 +426,8 @@ ulong cpu_init_f(void)
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{
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ulong flag = 0;
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extern void m8560_cpm_reset (void);
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#ifdef CONFIG_SYS_DCSRBAR_PHYS
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#if defined(CONFIG_SYS_DCSRBAR_PHYS) || \
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(defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET))
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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#endif
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#if defined(CONFIG_SECURE_BOOT)
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@ -458,6 +459,12 @@ ulong cpu_init_f(void)
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#if defined(CONFIG_SYS_CPC_REINIT_F)
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disable_cpc_sram();
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#endif
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#if defined(CONFIG_FSL_CORENET)
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/* Put PAMU in bypass mode */
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out_be32(&gur->pamubypenr, FSL_CORENET_PAMU_BYPASS);
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#endif
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#endif
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#ifdef CONFIG_CPM2
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@ -1912,6 +1912,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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u8 res24[64];
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u32 pblsr; /* Preboot loader status */
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u32 pamubypenr; /* PAMU bypass enable */
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#define FSL_CORENET_PAMU_BYPASS 0xffff0000
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u32 dmacr1; /* DMA control */
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u8 res25[4];
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u32 gensr1; /* General status */
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