EXYNOS5: Enable SPI booting.
This patch enables SPI Booting for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -36,7 +36,7 @@ COBJS += smdk5250.o
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endif
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endif
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_BUILD
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COBJS += mmc_boot.o
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COBJS += spl_boot.o
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endif
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endif
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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@ -23,6 +23,16 @@
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#include<common.h>
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#include<common.h>
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#include<config.h>
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#include<config.h>
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enum boot_mode {
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BOOT_MODE_MMC = 4,
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BOOT_MODE_SERIAL = 20,
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/* Boot based on Operating Mode pin settings */
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BOOT_MODE_OM = 32,
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BOOT_MODE_USB, /* Boot using USB download */
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};
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typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
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/*
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/*
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* Copy U-boot from mmc to RAM:
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* Copy U-boot from mmc to RAM:
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* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
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* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
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@ -30,9 +40,26 @@
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*/
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*/
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void copy_uboot_to_ram(void)
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void copy_uboot_to_ram(void)
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{
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{
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u32 (*copy_bl2)(u32, u32, u32) = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
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spi_copy_func_t spi_copy;
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enum boot_mode bootmode;
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u32 (*copy_bl2)(u32, u32, u32);
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copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
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bootmode = readl(EXYNOS5_POWER_BASE) & OM_STAT;
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switch (bootmode) {
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case BOOT_MODE_SERIAL:
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spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
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spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
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CONFIG_SYS_TEXT_BASE);
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break;
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case BOOT_MODE_MMC:
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copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
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copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
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CONFIG_SYS_TEXT_BASE);
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break;
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default:
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break;
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}
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}
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}
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void board_init_f(unsigned long bootflag)
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void board_init_f(unsigned long bootflag)
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@ -187,6 +187,11 @@
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/* U-boot copy size from boot Media to DRAM.*/
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/* U-boot copy size from boot Media to DRAM.*/
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#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
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#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
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#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
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#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
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#define OM_STAT (0x1f << 1)
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#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
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#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
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#define CONFIG_DOS_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_IRAM_STACK 0x02050000
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#define CONFIG_IRAM_STACK 0x02050000
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