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arm: mx6: Change defines ENET_xxMHz to ENET_xxMHZ (no CamelCase) 

As checkpatch complaines about these camel-case defines, lets change
them to only use upper-case characters.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Stefan Roese 2014-11-27 13:46:43 +01:00 committed by Stefano Babic
parent dd1c8f1b5f
commit 7731745c13
6 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/cpu/armv7/mx6/clock.c
View File

@ -443,7 +443,7 @@ int enable_fec_anatop_clock(enum enet_freq freq)
struct anatop_regs __iomem *anatop =
(struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
if (freq < ENET_25MHz || freq > ENET_125MHz)
if (freq < ENET_25MHZ || freq > ENET_125MHZ)
return -EINVAL;
reg = readl(&anatop->pll_enet);

8
arch/arm/include/asm/arch-mx6/clock.h
View File

@ -43,10 +43,10 @@ enum mxc_clock {
};
enum enet_freq {
ENET_25MHz,
ENET_50MHz,
ENET_100MHz,
ENET_125MHz,
ENET_25MHZ,
ENET_50MHZ,
ENET_100MHZ,
ENET_125MHZ,
};
u32 imx_get_uartclk(void);

2
board/aristainetos/aristainetos.c
View File

@ -301,7 +301,7 @@ int board_eth_init(bd_t *bis)
/* clear gpr1[14], gpr1[18:17] to select anatop clock */
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0);
ret = enable_fec_anatop_clock(ENET_50MHz);
ret = enable_fec_anatop_clock(ENET_50MHZ);
if (ret)
return ret;

2
board/freescale/mx6slevk/mx6slevk.c
View File

@ -234,7 +234,7 @@ static int setup_fec(void)
/* clear gpr1[14], gpr1[18:17] to select anatop clock */
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0);
return enable_fec_anatop_clock(ENET_50MHz);
return enable_fec_anatop_clock(ENET_50MHZ);
}
#endif

2
board/freescale/mx6sxsabresd/mx6sxsabresd.c
View File

@ -168,7 +168,7 @@ static int setup_fec(void)
reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
writel(reg, &anatop->pll_enet);
return enable_fec_anatop_clock(ENET_125MHz);
return enable_fec_anatop_clock(ENET_125MHZ);
}
int board_eth_init(bd_t *bis)

2
board/solidrun/hummingboard/hummingboard.c
View File

@ -146,7 +146,7 @@ int board_eth_init(bd_t *bis)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
int ret = enable_fec_anatop_clock(ENET_25MHz);
int ret = enable_fec_anatop_clock(ENET_25MHZ);
if (ret)
return ret;