spi: tegra: Use GENMASK
Replace numeric mask hexcodes with GENMASK macro in tegra*.c Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
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@ -35,9 +35,9 @@ DECLARE_GLOBAL_DATA_PTR;
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/* COMMAND1 */
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#define SPI_CMD1_GO BIT(31)
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#define SPI_CMD1_M_S BIT(30)
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#define SPI_CMD1_MODE_MASK 0x3
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#define SPI_CMD1_MODE_MASK GENMASK(1, 0)
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#define SPI_CMD1_MODE_SHIFT 28
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#define SPI_CMD1_CS_SEL_MASK 0x3
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#define SPI_CMD1_CS_SEL_MASK GENMASK(1, 0)
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#define SPI_CMD1_CS_SEL_SHIFT 26
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#define SPI_CMD1_CS_POL_INACTIVE3 BIT(25)
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#define SPI_CMD1_CS_POL_INACTIVE2 BIT(24)
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@ -45,7 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SPI_CMD1_CS_POL_INACTIVE0 BIT(22)
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#define SPI_CMD1_CS_SW_HW BIT(21)
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#define SPI_CMD1_CS_SW_VAL BIT(20)
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#define SPI_CMD1_IDLE_SDA_MASK 0x3
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#define SPI_CMD1_IDLE_SDA_MASK GENMASK(1, 0)
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#define SPI_CMD1_IDLE_SDA_SHIFT 18
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#define SPI_CMD1_BIDIR BIT(17)
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#define SPI_CMD1_LSBI_FE BIT(16)
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@ -55,14 +55,14 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SPI_CMD1_RX_EN BIT(12)
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#define SPI_CMD1_TX_EN BIT(11)
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#define SPI_CMD1_PACKED BIT(5)
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#define SPI_CMD1_BIT_LEN_MASK 0x1F
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#define SPI_CMD1_BIT_LEN_MASK GENMASK(4, 0)
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#define SPI_CMD1_BIT_LEN_SHIFT 0
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/* COMMAND2 */
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#define SPI_CMD2_TX_CLK_TAP_DELAY BIT(6)
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#define SPI_CMD2_TX_CLK_TAP_DELAY_MASK (0x3F << 6)
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#define SPI_CMD2_TX_CLK_TAP_DELAY_MASK GENMASK(11, 6)
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#define SPI_CMD2_RX_CLK_TAP_DELAY BIT(0)
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#define SPI_CMD2_RX_CLK_TAP_DELAY_MASK (0x3F << 0)
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#define SPI_CMD2_RX_CLK_TAP_DELAY_MASK GENMASK(5, 0)
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/* TRANSFER STATUS */
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#define SPI_XFER_STS_RDY BIT(30)
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@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SPI_CMD_CS1_EN BIT(6)
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#define SPI_CMD_CS0_EN BIT(5)
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#define SPI_CMD_BIT_LENGTH BIT(4)
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#define SPI_CMD_BIT_LENGTH_MASK 0x0000001F
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#define SPI_CMD_BIT_LENGTH_MASK GENMASK(4, 0)
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#define SPI_STAT_BSY BIT(31)
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#define SPI_STAT_RDY BIT(30)
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@ -46,13 +46,13 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SLINK_CMD_CS_VAL BIT(12)
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#define SLINK_CMD_CS_SOFT BIT(11)
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#define SLINK_CMD_BIT_LENGTH BIT(4)
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#define SLINK_CMD_BIT_LENGTH_MASK 0x0000001F
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#define SLINK_CMD_BIT_LENGTH_MASK GENMASK(4, 0)
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/* COMMAND2 */
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#define SLINK_CMD2_TXEN BIT(30)
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#define SLINK_CMD2_RXEN BIT(31)
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#define SLINK_CMD2_SS_EN BIT(18)
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#define SLINK_CMD2_SS_EN_SHIFT 18
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#define SLINK_CMD2_SS_EN_MASK 0x000C0000
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#define SLINK_CMD2_SS_EN_MASK GENMASK(19, 18)
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#define SLINK_CMD2_CS_ACTIVE_BETWEEN BIT(17)
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/* STATUS */
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#define SLINK_STAT_BSY BIT(31)
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