cpu: Add support for microcode version and CPU ID
Some CPUs use microcode and each core can have a different version of microcode loaded. Also some CPUs support the concept of an integer ID used for identification purposes. Add support for these in the CPU uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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@ -14,6 +14,7 @@
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static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
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static const char *cpu_feature_name[CPU_FEAT_COUNT] = {
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"L1 cache",
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"L1 cache",
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"MMU",
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"MMU",
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"Microcode",
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};
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};
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static int print_cpu_list(bool detail)
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static int print_cpu_list(bool detail)
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@ -58,6 +59,12 @@ static int print_cpu_list(bool detail)
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}
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}
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}
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}
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printf("\n");
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printf("\n");
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if (info.features & (1 << CPU_FEAT_UCODE)) {
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printf("\tMicrocode version %#x\n",
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plat->ucode_version);
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}
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if (info.features & (1 << CPU_FEAT_DEVICE_ID))
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printf("\tDevice ID %#lx\n", plat->device_id);
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}
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}
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return 0;
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return 0;
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@ -15,15 +15,20 @@
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* device.
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* device.
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*
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*
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* @cpu_id: Platform-specific way of identifying the CPU.
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* @cpu_id: Platform-specific way of identifying the CPU.
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* @ucode_version: Microcode version, if CPU_FEAT_UCODE is set
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*/
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*/
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struct cpu_platdata {
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struct cpu_platdata {
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int cpu_id;
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int cpu_id;
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int ucode_version;
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ulong device_id;
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};
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};
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/* CPU features - mostly just a placeholder for now */
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/* CPU features - mostly just a placeholder for now */
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enum {
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enum {
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CPU_FEAT_L1_CACHE = 0, /* Supports level 1 cache */
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CPU_FEAT_L1_CACHE = 0, /* Supports level 1 cache */
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CPU_FEAT_MMU = 1, /* Supports virtual memory */
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CPU_FEAT_MMU = 1, /* Supports virtual memory */
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CPU_FEAT_UCODE = 2, /* Requires/uses microcode */
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CPU_FEAT_DEVICE_ID = 3, /* Provides a device ID */
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CPU_FEAT_COUNT,
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CPU_FEAT_COUNT,
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};
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};
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