arm: rmobile: Add support gose board
The gose board has R8A7793, 1GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF - QSPI - SPI Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -6,6 +6,9 @@ choice
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config TARGET_ARMADILLO_800EVA
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bool "armadillo 800 eva board"
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config TARGET_GOSE
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bool "Gose board"
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config TARGET_KOELSCH
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bool "Koelsch board"
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@ -29,6 +32,7 @@ config RMOBILE_EXTRAM_BOOT
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default n
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source "board/atmark-techno/armadillo-800eva/Kconfig"
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source "board/renesas/gose/Kconfig"
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source "board/renesas/koelsch/Kconfig"
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source "board/renesas/lager/Kconfig"
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source "board/kmc/kzm9g/Kconfig"
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@ -0,0 +1,12 @@
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if TARGET_GOSE
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config SYS_BOARD
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default "gose"
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config SYS_VENDOR
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default "renesas"
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config SYS_CONFIG_NAME
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default "gose"
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endif
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@ -0,0 +1,6 @@
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ALT BOARD
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M: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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S: Maintained
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F: board/renesas/gose/
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F: include/configs/gose.h
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F: configs/gose_defconfig
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@ -0,0 +1,9 @@
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#
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# board/renesas/alt/Makefile
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#
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# Copyright (C) 2014 Renesas Electronics Corporation
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#
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# SPDX-License-Identifier: GPL-2.0
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#
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obj-y := gose.o qos.o
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@ -0,0 +1,116 @@
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/*
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* board/renesas/gose/gose.c
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <malloc.h>
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#include <asm/processor.h>
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#include <asm/mach-types.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <i2c.h>
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#include "qos.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define CLK2MHZ(clk) (clk / 1000 / 1000)
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void s_init(void)
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{
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struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
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struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
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u32 stc;
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/* Watchdog init */
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writel(0xA5A5A500, &rwdt->rwtcsra);
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writel(0xA5A5A500, &swdt->swtcsra);
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/* CPU frequency setting. Set to 1.5GHz */
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stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
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clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
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/* QoS */
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qos_init();
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}
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#define MSTPSR1 0xE6150038
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#define SMSTPCR1 0xE6150134
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#define TMU0_MSTP125 (1 << 25)
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#define MSTPSR7 0xE61501C4
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#define SMSTPCR7 0xE615014C
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#define SCIF0_MSTP721 (1 << 21)
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#define mstp_setbits(type, addr, saddr, set) \
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out_##type((saddr), in_##type(addr) | (set))
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#define mstp_clrbits(type, addr, saddr, clear) \
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out_##type((saddr), in_##type(addr) & ~(clear))
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#define mstp_setbits_le32(addr, saddr, set) \
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mstp_setbits(le32, addr, saddr, set)
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#define mstp_clrbits_le32(addr, saddr, clear) \
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mstp_clrbits(le32, addr, saddr, clear)
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int board_early_init_f(void)
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{
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/* TMU0 */
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mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
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/* SCIF0 */
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mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721);
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return 0;
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}
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#define TSTR0 0x04
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#define TSTR0_STR0 0x01
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void arch_preboot_os(void)
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{
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/* stop TMU0 */
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mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
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/* Disable TMU0 */
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mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = GOSE_SDRAM_BASE + 0x100;
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/* Init PFC controller */
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r8a7793_pinmux_init();
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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const struct rmobile_sysinfo sysinfo = {
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CONFIG_RMOBILE_BOARD_STRING
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};
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = GOSE_SDRAM_BASE;
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gd->bd->bi_dram[0].size = GOSE_SDRAM_SIZE;
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}
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void reset_cpu(ulong addr)
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{
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u8 val;
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i2c_set_bus_num(2); /* PowerIC connected to ch2 */
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i2c_read(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
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val |= 0x02;
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i2c_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x13, 1, &val, 1);
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}
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,12 @@
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/*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __QOS_H__
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#define __QOS_H__
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void qos_init(void);
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#endif
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@ -0,0 +1,3 @@
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CONFIG_ARM=y
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CONFIG_RMOBILE=y
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CONFIG_TARGET_GOSE=y
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@ -0,0 +1,150 @@
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/*
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* include/configs/gose.h
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __GOSE_H
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#define __GOSE_H
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#undef DEBUG
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#define CONFIG_R8A7793
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#define CONFIG_RMOBILE_BOARD_STRING "Gose"
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#define CONFIG_SH_GPIO_PFC
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#include <asm/arch/rmobile.h>
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#define CONFIG_CMD_EDITENV
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_DFL
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_I2C
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#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
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#define CONFIG_SYS_TEXT_BASE 0x70000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0xE6304000
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#endif
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_SYS_GENERIC_BOARD
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_OF_LIBFDT
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS ""
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#define CONFIG_VERSION_VARIABLE
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#undef CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_TMU_TIMER
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/* STACK */
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#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
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#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
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#else
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#define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
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#endif
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#define STACK_AREA_SIZE 0xC000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define GOSE_SDRAM_BASE 0x40000000
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#define GOSE_SDRAM_SIZE 0x40000000
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#define GOSE_UBOOT_SDRAM_SIZE 0x20000000
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE 512
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#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF0
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#define CONFIG_SCIF_USE_EXT_CLK
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#undef CONFIG_SYS_CONSOLE_INFO_QUIET
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#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
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#define CONFIG_SYS_MEMTEST_START (GOSE_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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504 * 1024 * 1024)
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#undef CONFIG_SYS_ALT_MEMTEST
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#undef CONFIG_SYS_MEMTEST_SCRATCH
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_SDRAM_BASE (GOSE_SDRAM_BASE)
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#define CONFIG_SYS_SDRAM_SIZE (GOSE_UBOOT_SDRAM_SIZE)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/* FLASH */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SPI
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#define CONFIG_SH_QSPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SPI_FLASH_SPANSION
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/* ENV setting */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_ADDR 0xC0000
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/* Common ENV setting */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_SECT_SIZE (256 * 1024)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_SH_SCIF_CLK_FREQ 14745600
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#define CONFIG_SYS_TMU_CLK_DIV 4
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
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#define CONFIG_SYS_I2C_SH_BASE0 0xE6500000
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SYS_I2C_SH_BASE1 0xE6510000
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#define CONFIG_SYS_I2C_SH_SPEED1 400000
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#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
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#define CONFIG_SYS_I2C_SH_SPEED2 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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#define CONFIG_SH_I2C_CLOCK 10000000
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#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
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#endif /* __GOSE_H */
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