V3s_Allwinner
/
uboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 2 Wiki Activity

MX: Set a common gpio.h for all i.MX 

Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
This commit is contained in:
Stefano Babic 2012-08-19 21:33:50 +00:00 committed by Albert ARIBAUD
parent c55068e5b8
commit 5fecb36ca0
11 changed files with 78 additions and 80 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
arch/arm/include/asm/arch-mx25/gpio.h
View File

@ -25,21 +25,6 @@
#ifndef __ASM_ARCH_MX25_GPIO_H
#define __ASM_ARCH_MX25_GPIO_H
/* Converts a GPIO port number and the internal bit position
* to the GPIO number
*/
#define MXC_GPIO_PORT_TO_NUM(port, bit) (((port - 1) << 5) + (bit & 0x1f))
/* GPIO registers */
struct gpio_regs {
u32 gpio_dr; /* data */
u32 gpio_dir; /* direction */
u32 psr; /* pad satus */
u32 icr1; /* interrupt config 1 */
u32 icr2; /* interrupt config 2 */
u32 imr; /* interrupt mask */
u32 isr; /* interrupt status */
u32 edge_sel; /* edge select */
};
#include <asm/imx-common/gpio.h>
#endif

7
arch/arm/include/asm/arch-mx31/gpio.h
View File

@ -25,11 +25,6 @@
#ifndef __ASM_ARCH_MX31_GPIO_H
#define __ASM_ARCH_MX31_GPIO_H
/* GPIO Registers */
struct gpio_regs {
u32 gpio_dr;
u32 gpio_dir;
u32 gpio_psr;
};
#include <asm/imx-common/gpio.h>
#endif

12
arch/arm/include/asm/arch-mx35/gpio.h
View File

@ -25,16 +25,6 @@
#ifndef __ASM_ARCH_MX35_GPIO_H
#define __ASM_ARCH_MX35_GPIO_H
/* GPIO registers */
struct gpio_regs {
u32 gpio_dr; /* data */
u32 gpio_dir; /* direction */
u32 psr; /* pad satus */
u32 icr1; /* interrupt config 1 */
u32 icr2; /* interrupt config 2 */
u32 imr; /* interrupt mask */
u32 isr; /* interrupt status */
u32 edge_sel; /* edge select */
};
#include <asm/imx-common/gpio.h>
#endif

7
arch/arm/include/asm/arch-mx5/gpio.h
View File

@ -25,11 +25,6 @@
#ifndef __ASM_ARCH_MX5_GPIO_H
#define __ASM_ARCH_MX5_GPIO_H
/* GPIO registers */
struct gpio_regs {
u32 gpio_dr;
u32 gpio_dir;
u32 gpio_psr;
};
#include <asm/imx-common/gpio.h>
#endif

7
arch/arm/include/asm/arch-mx6/gpio.h
View File

@ -25,11 +25,6 @@
#ifndef __ASM_ARCH_MX6_GPIO_H
#define __ASM_ARCH_MX6_GPIO_H
/* GPIO registers */
struct gpio_regs {
u32 gpio_dr;
u32 gpio_dir;
u32 gpio_psr;
};
#include <asm/imx-common/gpio.h>
#endif /* __ASM_ARCH_MX6_GPIO_H */

2
arch/arm/include/asm/arch-mx6/imx-regs.h
View File

@ -172,8 +172,6 @@
#define IMX_IIM_BASE OCOTP_BASE_ADDR
#define FEC_QUIRK_ENET_MAC
#define GPIO_NUMBER(port, index) ((((port)-1)*32)+((index)&31))
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>

39
arch/arm/include/asm/imx-common/gpio.h Normal file
View File

@ -0,0 +1,39 @@
/*
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_IMX_GPIO_H
#define __ASM_ARCH_IMX_GPIO_H
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
/* GPIO registers */
struct gpio_regs {
u32 gpio_dr; /* data */
u32 gpio_dir; /* direction */
u32 gpio_psr; /* pad satus */
};
#endif
#define IMX_GPIO_NR(port, index) ((((port)-1)*32)+((index)&31))
#endif

28
board/freescale/mx6qsabrelite/mx6qsabrelite.c
View File

@ -87,12 +87,12 @@ struct i2c_pads_info i2c_pad_info0 = {
.scl = {
.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
.gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC,
.gp = GPIO_NUMBER(3, 21)
.gp = IMX_GPIO_NR(3, 21)
},
.sda = {
.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
.gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC,
.gp = GPIO_NUMBER(3, 28)
.gp = IMX_GPIO_NR(3, 28)
}
};
@ -101,12 +101,12 @@ struct i2c_pads_info i2c_pad_info1 = {
.scl = {
.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC,
.gp = GPIO_NUMBER(4, 12)
.gp = IMX_GPIO_NR(4, 12)
},
.sda = {
.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC,
.gp = GPIO_NUMBER(4, 13)
.gp = IMX_GPIO_NR(4, 13)
}
};
@ -115,12 +115,12 @@ struct i2c_pads_info i2c_pad_info2 = {
.scl = {
.i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC,
.gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC,
.gp = GPIO_NUMBER(1, 5)
.gp = IMX_GPIO_NR(1, 5)
},
.sda = {
.i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC,
.gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC,
.gp = GPIO_NUMBER(7, 11)
.gp = IMX_GPIO_NR(7, 11)
}
};
@ -229,9 +229,9 @@ int board_ehci_hcd_init(int port)
imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads));
/* Reset USB hub */
gpio_direction_output(GPIO_NUMBER(7, 12), 0);
gpio_direction_output(IMX_GPIO_NR(7, 12), 0);
mdelay(2);
gpio_set_value(GPIO_NUMBER(7, 12), 1);
gpio_set_value(IMX_GPIO_NR(7, 12), 1);
return 0;
}
@ -413,12 +413,12 @@ struct button_key {
};
static struct button_key const buttons[] = {
{"back", GPIO_NUMBER(2, 2), 'B'},
{"home", GPIO_NUMBER(2, 4), 'H'},
{"menu", GPIO_NUMBER(2, 1), 'M'},
{"search", GPIO_NUMBER(2, 3), 'S'},
{"volup", GPIO_NUMBER(7, 13), 'V'},
{"voldown", GPIO_NUMBER(4, 5), 'v'},
{"back", IMX_GPIO_NR(2, 2), 'B'},
{"home", IMX_GPIO_NR(2, 4), 'H'},
{"menu", IMX_GPIO_NR(2, 1), 'M'},
{"search", IMX_GPIO_NR(2, 3), 'S'},
{"volup", IMX_GPIO_NR(7, 13), 'V'},
{"voldown", IMX_GPIO_NR(4, 5), 'v'},
};
/*

10
board/karo/tx25/tx25.c
View File

@ -34,8 +34,8 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_FEC_MXC
#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7)
#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9)
#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)
void tx25_fec_init(void)
{
struct iomuxc_mux_ctl *muxctl;
@ -103,9 +103,9 @@ void tx25_fec_init(void)
/*
* set each to 1 and make each an output
*/
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 10), 1);
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 11), 1);
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 12), 1);
gpio_direction_output(IMX_GPIO_NR(3, 10), 1);
gpio_direction_output(IMX_GPIO_NR(3, 11), 1);
gpio_direction_output(IMX_GPIO_NR(3, 12), 1);
mdelay(22); /* this value came from RedBoot */

26
board/syteco/zmx25/zmx25.c
View File

@ -56,7 +56,7 @@ int board_init()
/* Setup of core volatage selection pin to run at 1.4V */
writel(gpio_mux_mode5, &muxctl->pad_ext_armclk); /* VCORE GPIO3[15] */
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 15), 1);
gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
/* Setup of input daisy chains for SD card pins*/
writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd);
@ -68,10 +68,10 @@ int board_init()
/* Setup of digital output for USB power and OC */
writel(gpio_mux_mode5, &muxctl->pad_csi_d3); /* USB Power GPIO1[28] */
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(1, 28), 1);
gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
writel(gpio_mux_mode5, &muxctl->pad_csi_d2); /* USB OC GPIO1[27] */
gpio_direction_input(MXC_GPIO_PORT_TO_NUM(1, 18));
gpio_direction_input(IMX_GPIO_NR(1, 18));
/* Setup of digital output control pins */
writel(gpio_mux_mode5, &muxctl->pad_csi_d8); /* Ouput 1 Ctrl GPIO1[7] */
@ -83,21 +83,21 @@ int board_init()
writel(0, &padctl->pad_csi_d5); /* Ouput 2 Stat pull up off */
/* Switch both output drivers off */
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(1, 7), 0);
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(1, 6), 0);
gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
/* Setup of key input pin GPIO2[29]*/
writel(gpio_mux_mode5 | MX25_PIN_MUX_SION, &muxctl->pad_kpp_row0);
writel(0, &padctl->pad_kpp_row0); /* Key pull up off */
gpio_direction_input(MXC_GPIO_PORT_TO_NUM(2, 29));
gpio_direction_input(IMX_GPIO_NR(2, 29));
/* Setup of status LED outputs */
writel(gpio_mux_mode5, &muxctl->pad_csi_d9); /* GPIO4[21] */
writel(gpio_mux_mode5, &muxctl->pad_csi_d4); /* GPIO1[29] */
/* Switch both LEDs off */
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(4, 21), 0);
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(1, 29), 0);
gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
/* Setup of CAN1 and CAN2 signals */
writel(gpio_mux_mode6, &muxctl->pad_gpio_a); /* CAN1 TX */
@ -148,12 +148,12 @@ int board_late_init(void)
writel(gpio_mux_mode2, &muxctl->pad_uart2_cts);
/* assert PHY reset (low) */
gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 16), 0);
gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
udelay(5000);
/* deassert PHY reset */
gpio_set_value(MXC_GPIO_PORT_TO_NUM(3, 16), 1);
gpio_set_value(IMX_GPIO_NR(3, 16), 1);
udelay(5000);
#endif
@ -161,12 +161,12 @@ int board_late_init(void)
e = getenv("gs_base_board");
if (e != NULL) {
if (strcmp(e, "G283") == 0) {
int key = gpio_get_value(MXC_GPIO_PORT_TO_NUM(2, 29));
int key = gpio_get_value(IMX_GPIO_NR(2, 29));
if (key) {
/* Switch on both LEDs to inidcate boot mode */
gpio_set_value(MXC_GPIO_PORT_TO_NUM(1, 29), 0);
gpio_set_value(MXC_GPIO_PORT_TO_NUM(4, 21), 0);
gpio_set_value(IMX_GPIO_NR(1, 29), 0);
gpio_set_value(IMX_GPIO_NR(4, 21), 0);
setenv("preboot", "run gs_slow_boot");
} else

3
include/configs/mx6qsabrelite.h
View File

@ -31,6 +31,7 @@
#define CONFIG_MACH_TYPE 3769
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
@ -53,7 +54,7 @@
#define CONFIG_SPI_FLASH_SST
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8))
#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
#define CONFIG_SF_DEFAULT_SPEED 25000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif