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Sound: I2S: Replacing I2S1 with I2S0 channel. 

This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
This commit is contained in:
Dani Krishna Mohan 2013-09-11 16:38:49 +05:30 committed by Tom Rini
parent 3dd22a37aa
commit 5fb5b15541
2 changed files with 38 additions and 13 deletions
arch/arm/include/asm/arch-exynos
i2s-regs.h
drivers/sound
samsung-i2s.c

6
arch/arm/include/asm/arch-exynos/i2s-regs.h
View File

@ -8,10 +8,12 @@
#ifndef __I2S_REGS_H__ #ifndef __I2S_REGS_H__
#define __I2S_REGS_H__ #define __I2S_REGS_H__
#define CON_RESET (1 << 31)
#define CON_TXFIFO_FULL (1 << 8) #define CON_TXFIFO_FULL (1 << 8)
#define CON_TXCH_PAUSE (1 << 4) #define CON_TXCH_PAUSE (1 << 4)
#define CON_ACTIVE (1 << 0) #define CON_ACTIVE (1 << 0)
#define MOD_OP_CLK (3 << 30)
#define MOD_BLCP_SHIFT 24 #define MOD_BLCP_SHIFT 24
#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT) #define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT) #define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
@ -24,6 +26,7 @@
#define MOD_BLC_MASK (3 << 13) #define MOD_BLC_MASK (3 << 13)
#define MOD_SLAVE (1 << 11) #define MOD_SLAVE (1 << 11)
#define MOD_RCLKSRC (0 << 10)
#define MOD_MASK (3 << 8) #define MOD_MASK (3 << 8)
#define MOD_LR_LLOW (0 << 7) #define MOD_LR_LLOW (0 << 7)
#define MOD_LR_RLOW (1 << 7) #define MOD_LR_RLOW (1 << 7)
@ -47,4 +50,7 @@
#define FIC_TXFLUSH (1 << 15) #define FIC_TXFLUSH (1 << 15)
#define FIC_RXFLUSH (1 << 7) #define FIC_RXFLUSH (1 << 7)
#define PSREN (1 << 15)
#define PSVAL (3 << 8)
#endif /* __I2S_REGS_H__ */ #endif /* __I2S_REGS_H__ */

29
drivers/sound/samsung-i2s.c
View File

@ -65,7 +65,6 @@ static void i2s_txctrl(struct i2s_reg *i2s_reg, int on)
if (on) { if (on) {
con |= CON_ACTIVE; con |= CON_ACTIVE;
con &= ~CON_TXCH_PAUSE; con &= ~CON_TXCH_PAUSE;
} else { } else {
con |= CON_TXCH_PAUSE; con |= CON_TXCH_PAUSE;
con &= ~CON_ACTIVE; con &= ~CON_ACTIVE;
@ -300,18 +299,29 @@ int i2s_tx_init(struct i2stx_info *pi2s_tx)
int ret; int ret;
struct i2s_reg *i2s_reg = struct i2s_reg *i2s_reg =
(struct i2s_reg *)pi2s_tx->base_address; (struct i2s_reg *)pi2s_tx->base_address;
if (pi2s_tx->id == 0) {
/* Initialize GPIO for I2S-0 */
exynos_pinmux_config(PERIPH_ID_I2S0, 0);
/* Initialize GPIO for I2s */ /* Set EPLL Clock */
ret = set_epll_clk(pi2s_tx->samplingrate * pi2s_tx->rfs * 4);
} else if (pi2s_tx->id == 1) {
/* Initialize GPIO for I2S-1 */
exynos_pinmux_config(PERIPH_ID_I2S1, 0); exynos_pinmux_config(PERIPH_ID_I2S1, 0);
/* Set EPLL Clock */ /* Set EPLL Clock */
ret = set_epll_clk(pi2s_tx->audio_pll_clk); ret = set_epll_clk(pi2s_tx->audio_pll_clk);
if (ret != 0) { } else {
debug("%s: epll clock set rate falied\n", __func__); debug("%s: unsupported i2s-%d bus\n", __func__, pi2s_tx->id);
return -1; return -1;
} }
/* Select Clk Source for Audio1 */ if (ret != 0) {
debug("%s: epll clock set rate failed\n", __func__);
return -1;
}
/* Select Clk Source for Audio 0 or 1 */
ret = set_i2s_clk_source(pi2s_tx->id); ret = set_i2s_clk_source(pi2s_tx->id);
if (ret == -1) { if (ret == -1) {
debug("%s: unsupported clock for i2s-%d\n", __func__, debug("%s: unsupported clock for i2s-%d\n", __func__,
@ -319,10 +329,19 @@ int i2s_tx_init(struct i2stx_info *pi2s_tx)
return -1; return -1;
} }
if (pi2s_tx->id == 0) {
/*Reset the i2s module */
writel(CON_RESET, &i2s_reg->con);
writel(MOD_OP_CLK | MOD_RCLKSRC, &i2s_reg->mod);
/* set i2s prescaler */
writel(PSREN | PSVAL, &i2s_reg->psr);
} else {
/* Set Prescaler to get MCLK */ /* Set Prescaler to get MCLK */
ret = set_i2s_clk_prescaler(pi2s_tx->audio_pll_clk, ret = set_i2s_clk_prescaler(pi2s_tx->audio_pll_clk,
(pi2s_tx->samplingrate * (pi2s_tx->rfs)), (pi2s_tx->samplingrate * (pi2s_tx->rfs)),
pi2s_tx->id); pi2s_tx->id);
}
if (ret == -1) { if (ret == -1) {
debug("%s: unsupported prescalar for i2s-%d\n", __func__, debug("%s: unsupported prescalar for i2s-%d\n", __func__,
pi2s_tx->id); pi2s_tx->id);